46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/ata/ata-all.h>
49 #include <dev/ata/ata-pci.h>
53 static int ata_cmd_ch_attach(device_t dev);
54 static int ata_cmd_status(device_t dev);
55 static int ata_cmd_setmode(device_t dev, int target, int mode);
56 static int ata_sii_ch_attach(device_t dev);
57 static int ata_sii_ch_detach(device_t dev);
58 static int ata_sii_status(device_t dev);
59 static void ata_sii_reset(device_t dev);
60 static int ata_sii_setmode(device_t dev, int target, int mode);
73 ata_sii_probe(device_t dev)  in ata_sii_probe()  argument
75     struct ata_pci_controller *ctlr = device_get_softc(dev);  in ata_sii_probe()
91     if (pci_get_vendor(dev) != ATA_SILICON_IMAGE_ID)  in ata_sii_probe()
94     if (!(ctlr->chip = ata_match_chip(dev, ids)))  in ata_sii_probe()
97     ata_set_desc(dev);  in ata_sii_probe()
103 ata_sii_chipinit(device_t dev)  in ata_sii_chipinit()  argument
105     struct ata_pci_controller *ctlr = device_get_softc(dev);  in ata_sii_chipinit()
107     if (ata_setup_interrupt(dev, ata_generic_intr))  in ata_sii_chipinit()
114 	if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,  in ata_sii_chipinit()
117 			    (pci_read_config(dev, 0x8a, 1) & 1))  in ata_sii_chipinit()
122 	    if ((pci_read_config(dev, 0x8a, 1) & 0x30) != 0x10)  in ata_sii_chipinit()
123 		pci_write_config(dev, 0x8a,  in ata_sii_chipinit()
124 				 (pci_read_config(dev, 0x8a, 1) & 0xcf)|0x10,1);  in ata_sii_chipinit()
125 	    if ((pci_read_config(dev, 0x8a, 1) & 0x30) != 0x10)  in ata_sii_chipinit()
126 		device_printf(dev, "%s could not set ATA133 clock\n",  in ata_sii_chipinit()
137 	pci_write_config(dev, 0x48,  in ata_sii_chipinit()
138 			 (pci_read_config(dev, 0x48, 4) & ~0x03c00000), 4);  in ata_sii_chipinit()
141 	pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1);  in ata_sii_chipinit()
158 	if ((pci_read_config(dev, 0x51, 1) & 0x08) != 0x08) {  in ata_sii_chipinit()
159 	    device_printf(dev, "HW has secondary channel disabled\n");  in ata_sii_chipinit()
164 	pci_write_config(dev, 0x71, 0x01, 1);  in ata_sii_chipinit()
175 ata_cmd_ch_attach(device_t dev)  in ata_cmd_ch_attach()  argument
177     struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));  in ata_cmd_ch_attach()
178     struct ata_channel *ch = device_get_softc(dev);  in ata_cmd_ch_attach()
181     if (ata_pci_ch_attach(dev))  in ata_cmd_ch_attach()
193 ata_cmd_status(device_t dev)  in ata_cmd_status()  argument
195     struct ata_channel *ch = device_get_softc(dev);  in ata_cmd_status()
198     if (((reg71 = pci_read_config(device_get_parent(dev), 0x71, 1)) &  in ata_cmd_status()
200 	pci_write_config(device_get_parent(dev), 0x71,  in ata_cmd_status()
202 	return ata_pci_status(dev);  in ata_cmd_status()
208 ata_cmd_setmode(device_t dev, int target, int mode)  in ata_cmd_setmode()  argument
210 	device_t parent = device_get_parent(dev);  in ata_cmd_setmode()
212 	struct ata_channel *ch = device_get_softc(dev);  in ata_cmd_setmode()
242 ata_sii_ch_attach(device_t dev)  in ata_sii_ch_attach()  argument
244     struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));  in ata_sii_ch_attach()
245     struct ata_channel *ch = device_get_softc(dev);  in ata_sii_ch_attach()
251 	ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8);  in ata_sii_ch_attach()
254     ch->r_io[ATA_CONTROL].offset = 0x8a + (unit01 << 6) + (unit10 << 8);  in ata_sii_ch_attach()
256     ata_default_registers(dev);  in ata_sii_ch_attach()
259     ch->r_io[ATA_BMCMD_PORT].offset = 0x00 + (unit01 << 3) + (unit10 << 8);  in ata_sii_ch_attach()
261     ch->r_io[ATA_BMSTAT_PORT].offset = 0x02 + (unit01 << 3) + (unit10 << 8);  in ata_sii_ch_attach()
263     ch->r_io[ATA_BMDTP_PORT].offset = 0x04 + (unit01 << 3) + (unit10 << 8);  in ata_sii_ch_attach()
267 	ch->r_io[ATA_SSTATUS].offset = 0x104 + (unit01 << 7) + (unit10 << 8);  in ata_sii_ch_attach()
269 	ch->r_io[ATA_SERROR].offset = 0x108 + (unit01 << 7) + (unit10 << 8);  in ata_sii_ch_attach()
271 	ch->r_io[ATA_SCONTROL].offset = 0x100 + (unit01 << 7) + (unit10 << 8);  in ata_sii_ch_attach()
277 	ATA_OUTL(ctlr->r_res2, 0x148 + (unit01 << 7) + (unit10 << 8),(1 << 16));  in ata_sii_ch_attach()
286     ata_pci_hw(dev);  in ata_sii_ch_attach()
291     ata_pci_dmainit(dev);  in ata_sii_ch_attach()
297 ata_sii_ch_detach(device_t dev)  in ata_sii_ch_detach()  argument
300     ata_pci_dmafini(dev);  in ata_sii_ch_detach()
305 ata_sii_status(device_t dev)  in ata_sii_status()  argument
307     struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));  in ata_sii_status()
308     struct ata_channel *ch = device_get_softc(dev);  in ata_sii_status()
309     int offset0 = ((ch->unit & 1) << 3) + ((ch->unit & 2) << 8);  in ata_sii_status()
310     int offset1 = ((ch->unit & 1) << 6) + ((ch->unit & 2) << 8);  in ata_sii_status()
315 	ata_sata_phy_check_events(dev, -1);  in ata_sii_status()
318 	return ata_pci_status(dev);  in ata_sii_status()
324 ata_sii_reset(device_t dev)  in ata_sii_reset()  argument
326     struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));  in ata_sii_reset()
327     struct ata_channel *ch = device_get_softc(dev);  in ata_sii_reset()
328     int offset = ((ch->unit & 1) << 7) + ((ch->unit & 2) << 8);  in ata_sii_reset()
336     if (ata_sata_phy_reset(dev, -1, 1))  in ata_sii_reset()
337 	ata_generic_reset(dev);  in ata_sii_reset()
343 ata_sii_setmode(device_t dev, int target, int mode)  in ata_sii_setmode()  argument
345 	device_t parent = device_get_parent(dev);  in ata_sii_setmode()
347 	struct ata_channel *ch = device_get_softc(dev);  in ata_sii_setmode()
368 		ata_print_cable(dev, "controller");  in ata_sii_setmode()