180     ExplicitSubRegs.push_back(RegBank.getReg(SRs[i]));  in buildObjectGraph()
188   if (CoveredBySubRegs && !ExplicitSubRegs.empty())  in buildObjectGraph()
189     ExplicitSubRegs.front()->LeadingSuperRegs.push_back(this);  in buildObjectGraph()
282   HasDisjunctSubRegs = ExplicitSubRegs.size() > 1;  in computeSubRegs()
285   for (unsigned i = 0, e = ExplicitSubRegs.size(); i != e; ++i) {  in computeSubRegs()
286     CodeGenRegister *SR = ExplicitSubRegs[i];  in computeSubRegs()
304   for (CodeGenRegister *ESR : ExplicitSubRegs) {  in computeSubRegs()
400   for (unsigned i = 0, e = ExplicitSubRegs.size(); i != e; ++i) {  in computeSubRegs()
401     CodeGenRegister *SR = ExplicitSubRegs[i];  in computeSubRegs()
402     if (!SR->CoveredBySubRegs || SR->ExplicitSubRegs.size() <= 1 ||  in computeSubRegs()
408     for (unsigned j = 0, e = SR->ExplicitSubRegs.size(); j != e; ++j) {  in computeSubRegs()
411         Parts.push_back(getSubRegIndex(SR->ExplicitSubRegs[j]));  in computeSubRegs()
424   for (unsigned i = 0, e = ExplicitSubRegs.size(); i != e; ++i) {  in computeSubRegs()
425     CodeGenRegister *SR = ExplicitSubRegs[i];  in computeSubRegs()
499       assert(!Cand->ExplicitSubRegs.empty() &&  in computeSecondarySubRegs()
501       if (Cand->ExplicitSubRegs.size() == 1)  in computeSecondarySubRegs()
506       assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct");  in computeSecondarySubRegs()
508       for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) {  in computeSecondarySubRegs()
589   for (unsigned i = 0, e = ExplicitSubRegs.size(); i != e; ++i) {  in addSubRegsPreOrder()
590     CodeGenRegister *SR = ExplicitSubRegs[i];  in addSubRegsPreOrder()