4559                                   SDValue &AlignedAddr, SDValue &BitShift,  in getCSAddressAndShifts()  argument
4570   BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr,  in getCSAddressAndShifts()
4572   BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift);  in getCSAddressAndShifts()
4577                             DAG.getConstant(0, DL, WideVT), BitShift);  in getCSAddressAndShifts()
4608   SDValue AlignedAddr, BitShift, NegBitShift;  in lowerATOMIC_LOAD_OP()  local
4609   getCSAddressAndShifts(Addr, DAG, DL, AlignedAddr, BitShift, NegBitShift);  in lowerATOMIC_LOAD_OP()
4626   SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift,  in lowerATOMIC_LOAD_OP()
4633   SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift,  in lowerATOMIC_LOAD_OP()
4704   SDValue AlignedAddr, BitShift, NegBitShift;  in lowerATOMIC_CMP_SWAP()  local
4705   getCSAddressAndShifts(Addr, DAG, DL, AlignedAddr, BitShift, NegBitShift);  in lowerATOMIC_CMP_SWAP()
4709   SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,  in lowerATOMIC_CMP_SWAP()
8565   Register BitShift = MI.getOperand(4).getReg();  in emitAtomicLoadBinary()  local
8608     .addReg(OldVal).addReg(BitShift).addImm(0);  in emitAtomicLoadBinary()
8660   Register BitShift = MI.getOperand(4).getReg();  in emitAtomicLoadMinMax()  local
8703     .addReg(OldVal).addReg(BitShift).addImm(0);  in emitAtomicLoadMinMax()
8762   Register BitShift = MI.getOperand(5).getReg();  in emitAtomicCmpSwapW()  local
8822     .addReg(OldVal).addReg(BitShift).addImm(BitSize);  in emitAtomicCmpSwapW()