Lines Matching refs:PPC
144 return RC->getID() == PPC::VSFRCRegClassID; in isVSFRCRegClass()
147 return RC->getID() == PPC::VSSRCRegClassID; in isVSSRCRegClass()
159 const PPC::Predicate Pred);
162 unsigned FP64LoadOpc = PPC::LFD);
200 static std::optional<PPC::Predicate> getComparePred(CmpInst::Predicate Pred) { in getComparePred()
232 return PPC::PRED_EQ; in getComparePred()
237 return PPC::PRED_GT; in getComparePred()
242 return PPC::PRED_GE; in getComparePred()
247 return PPC::PRED_LT; in getComparePred()
252 return PPC::PRED_LE; in getComparePred()
256 return PPC::PRED_NE; in getComparePred()
259 return PPC::PRED_NU; in getComparePred()
262 return PPC::PRED_UN; in getComparePred()
411 MRI.setRegClass(Addr.Base.Reg, &PPC::G8RC_and_G8RC_NOX0RegClass); in PPCComputeAddress()
430 Register ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress()
431 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ADDI8), in PPCSimplifyAddress()
465 (VT == MVT::f64 ? (HasSPE ? &PPC::SPERCRegClass : &PPC::F8RCRegClass) : in PPCEmitLoad()
466 (VT == MVT::f32 ? (HasSPE ? &PPC::GPRCRegClass : &PPC::F4RCRegClass) : in PPCEmitLoad()
467 (VT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in PPCEmitLoad()
468 &PPC::GPRC_and_GPRC_NOR0RegClass))))); in PPCEmitLoad()
470 bool Is32BitInt = UseRC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitLoad()
476 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad()
479 Opc = (IsZExt ? (Is32BitInt ? PPC::LHZ : PPC::LHZ8) in PPCEmitLoad()
480 : (Is32BitInt ? PPC::LHA : PPC::LHA8)); in PPCEmitLoad()
483 Opc = (IsZExt ? (Is32BitInt ? PPC::LWZ : PPC::LWZ8) in PPCEmitLoad()
484 : (Is32BitInt ? PPC::LWA_32 : PPC::LWA)); in PPCEmitLoad()
485 if ((Opc == PPC::LWA || Opc == PPC::LWA_32) && ((Addr.Offset & 3) != 0)) in PPCEmitLoad()
489 Opc = PPC::LD; in PPCEmitLoad()
490 assert(UseRC->hasSuperClassEq(&PPC::G8RCRegClass) && in PPCEmitLoad()
495 Opc = Subtarget->hasSPE() ? PPC::SPELWZ : PPC::LFS; in PPCEmitLoad()
511 bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS; in PPCEmitLoad()
512 bool Is64VSXLoad = IsVSFRC && Opc == PPC::LFD; in PPCEmitLoad()
553 case PPC::LBZ: Opc = PPC::LBZX; break; in PPCEmitLoad()
554 case PPC::LBZ8: Opc = PPC::LBZX8; break; in PPCEmitLoad()
555 case PPC::LHZ: Opc = PPC::LHZX; break; in PPCEmitLoad()
556 case PPC::LHZ8: Opc = PPC::LHZX8; break; in PPCEmitLoad()
557 case PPC::LHA: Opc = PPC::LHAX; break; in PPCEmitLoad()
558 case PPC::LHA8: Opc = PPC::LHAX8; break; in PPCEmitLoad()
559 case PPC::LWZ: Opc = PPC::LWZX; break; in PPCEmitLoad()
560 case PPC::LWZ8: Opc = PPC::LWZX8; break; in PPCEmitLoad()
561 case PPC::LWA: Opc = PPC::LWAX; break; in PPCEmitLoad()
562 case PPC::LWA_32: Opc = PPC::LWAX_32; break; in PPCEmitLoad()
563 case PPC::LD: Opc = PPC::LDX; break; in PPCEmitLoad()
564 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad()
565 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
566 case PPC::EVLDD: Opc = PPC::EVLDDX; break; in PPCEmitLoad()
567 case PPC::SPELWZ: Opc = PPC::SPELWZX; break; in PPCEmitLoad()
580 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg); in PPCEmitLoad()
611 Subtarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in SelectLoad()
624 bool Is32BitInt = RC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitStore()
630 Opc = Is32BitInt ? PPC::STB : PPC::STB8; in PPCEmitStore()
633 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
637 Opc = PPC::STW; in PPCEmitStore()
640 Opc = PPC::STD; in PPCEmitStore()
644 Opc = Subtarget->hasSPE() ? PPC::SPESTW : PPC::STFS; in PPCEmitStore()
647 Opc = Subtarget->hasSPE() ? PPC::EVSTDD : PPC::STFD; in PPCEmitStore()
660 bool Is32VSXStore = IsVSSRC && Opc == PPC::STFS; in PPCEmitStore()
661 bool Is64VSXStore = IsVSFRC && Opc == PPC::STFD; in PPCEmitStore()
703 case PPC::STB: Opc = PPC::STBX; break; in PPCEmitStore()
704 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
705 case PPC::STW : Opc = PPC::STWX; break; in PPCEmitStore()
706 case PPC::STB8: Opc = PPC::STBX8; break; in PPCEmitStore()
707 case PPC::STH8: Opc = PPC::STHX8; break; in PPCEmitStore()
708 case PPC::STW8: Opc = PPC::STWX8; break; in PPCEmitStore()
709 case PPC::STD: Opc = PPC::STDX; break; in PPCEmitStore()
710 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
711 case PPC::STFD: Opc = IsVSFRC ? PPC::STXSDX : PPC::STFDX; break; in PPCEmitStore()
712 case PPC::EVSTDD: Opc = PPC::EVSTDDX; break; in PPCEmitStore()
713 case PPC::SPESTW: Opc = PPC::SPESTWX; break; in PPCEmitStore()
726 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg); in PPCEmitStore()
772 std::optional<PPC::Predicate> OptPPCPred = in SelectBranch()
777 PPC::Predicate PPCPred = *OptPPCPred; in SelectBranch()
782 PPCPred = PPC::InvertPredicate(PPCPred); in SelectBranch()
785 Register CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch()
791 BuildMI(*BrBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::BCC)) in SelectBranch()
792 .addImm(Subtarget->hasSPE() ? PPC::PRED_SPE : PPCPred) in SelectBranch()
819 const PPC::Predicate Pred) { in PPCEmitCmp()
873 case PPC::PRED_EQ: in PPCEmitCmp()
874 CmpOpc = PPC::EFSCMPEQ; in PPCEmitCmp()
876 case PPC::PRED_LT: in PPCEmitCmp()
877 CmpOpc = PPC::EFSCMPLT; in PPCEmitCmp()
879 case PPC::PRED_GT: in PPCEmitCmp()
880 CmpOpc = PPC::EFSCMPGT; in PPCEmitCmp()
884 CmpOpc = PPC::FCMPUS; in PPCEmitCmp()
886 SrcReg1 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg1); in PPCEmitCmp()
888 SrcReg2 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg2); in PPCEmitCmp()
895 case PPC::PRED_EQ: in PPCEmitCmp()
896 CmpOpc = PPC::EFDCMPEQ; in PPCEmitCmp()
898 case PPC::PRED_LT: in PPCEmitCmp()
899 CmpOpc = PPC::EFDCMPLT; in PPCEmitCmp()
901 case PPC::PRED_GT: in PPCEmitCmp()
902 CmpOpc = PPC::EFDCMPGT; in PPCEmitCmp()
906 CmpOpc = PPC::XSCMPUDP; in PPCEmitCmp()
908 CmpOpc = PPC::FCMPUD; in PPCEmitCmp()
918 CmpOpc = IsZExt ? PPC::CMPLW : PPC::CMPW; in PPCEmitCmp()
920 CmpOpc = IsZExt ? PPC::CMPLWI : PPC::CMPWI; in PPCEmitCmp()
924 CmpOpc = IsZExt ? PPC::CMPLD : PPC::CMPD; in PPCEmitCmp()
926 CmpOpc = IsZExt ? PPC::CMPLDI : PPC::CMPDI; in PPCEmitCmp()
931 Register ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp()
937 Register ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp()
989 DestReg = createResultReg(&PPC::GPRCRegClass); in SelectFPTrunc()
990 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::EFSCFD), in SelectFPTrunc()
994 DestReg = createResultReg(&PPC::VSSRCRegClass); in SelectFPTrunc()
995 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::XSRSP), in SelectFPTrunc()
999 SrcReg = copyRegToRegClass(&PPC::F8RCRegClass, SrcReg); in SelectFPTrunc()
1000 DestReg = createResultReg(&PPC::F4RCRegClass); in SelectFPTrunc()
1002 TII.get(PPC::FRSP), DestReg) in SelectFPTrunc()
1022 Register TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg()
1039 unsigned LoadOpc = PPC::LFD; in PPCMoveToFPReg()
1043 LoadOpc = PPC::LFIWZX; in PPCMoveToFPReg()
1046 LoadOpc = PPC::LFIWAX; in PPCMoveToFPReg()
1051 const TargetRegisterClass *RC = &PPC::F8RCRegClass; in PPCMoveToFPReg()
1090 Opc = IsSigned ? PPC::EFSCFSI : PPC::EFSCFUI; in SelectIToFP()
1092 Opc = IsSigned ? PPC::EFDCFSI : PPC::EFDCFUI; in SelectIToFP()
1094 Register DestReg = createResultReg(&PPC::SPERCRegClass); in SelectIToFP()
1117 Register TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP()
1130 const TargetRegisterClass *RC = &PPC::F8RCRegClass; in SelectIToFP()
1135 Opc = IsSigned ? PPC::FCFIDS : PPC::FCFIDUS; in SelectIToFP()
1137 Opc = IsSigned ? PPC::FCFID : PPC::FCFIDU; in SelectIToFP()
1216 if (InRC == &PPC::F4RCRegClass) in SelectFPToI()
1217 SrcReg = copyRegToRegClass(&PPC::F8RCRegClass, SrcReg); in SelectFPToI()
1218 else if (InRC == &PPC::VSSRCRegClass) in SelectFPToI()
1219 SrcReg = copyRegToRegClass(&PPC::VSFRCRegClass, SrcReg); in SelectFPToI()
1228 DestReg = createResultReg(&PPC::GPRCRegClass); in SelectFPToI()
1230 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ; in SelectFPToI()
1232 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ; in SelectFPToI()
1234 DestReg = createResultReg(&PPC::VSFRCRegClass); in SelectFPToI()
1236 Opc = IsSigned ? PPC::XSCVDPSXWS : PPC::XSCVDPUXWS; in SelectFPToI()
1238 Opc = IsSigned ? PPC::XSCVDPSXDS : PPC::XSCVDPUXDS; in SelectFPToI()
1240 DestReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI()
1243 Opc = PPC::FCTIWZ; in SelectFPToI()
1245 Opc = Subtarget->hasFPCVT() ? PPC::FCTIWUZ : PPC::FCTIDZ; in SelectFPToI()
1247 Opc = IsSigned ? PPC::FCTIDZ : PPC::FCTIDUZ; in SelectFPToI()
1282 &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1283 bool IsGPRC = RC->hasSuperClassEq(&PPC::GPRCRegClass); in SelectBinaryIntOp()
1289 Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8; in SelectBinaryIntOp()
1292 Opc = IsGPRC ? PPC::OR : PPC::OR8; in SelectBinaryIntOp()
1295 Opc = IsGPRC ? PPC::SUBF : PPC::SUBF8; in SelectBinaryIntOp()
1299 Register ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp()
1312 case PPC::ADD4: in SelectBinaryIntOp()
1313 Opc = PPC::ADDI; in SelectBinaryIntOp()
1314 MRI.setRegClass(SrcReg1, &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1316 case PPC::ADD8: in SelectBinaryIntOp()
1317 Opc = PPC::ADDI8; in SelectBinaryIntOp()
1318 MRI.setRegClass(SrcReg1, &PPC::G8RC_and_G8RC_NOX0RegClass); in SelectBinaryIntOp()
1320 case PPC::OR: in SelectBinaryIntOp()
1321 Opc = PPC::ORI; in SelectBinaryIntOp()
1323 case PPC::OR8: in SelectBinaryIntOp()
1324 Opc = PPC::ORI8; in SelectBinaryIntOp()
1326 case PPC::SUBF: in SelectBinaryIntOp()
1330 Opc = PPC::ADDI; in SelectBinaryIntOp()
1331 MRI.setRegClass(SrcReg1, &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1335 case PPC::SUBF8: in SelectBinaryIntOp()
1339 Opc = PPC::ADDI8; in SelectBinaryIntOp()
1340 MRI.setRegClass(SrcReg1, &PPC::G8RC_and_G8RC_NOX0RegClass); in SelectBinaryIntOp()
1424 unsigned NextGPR = PPC::X3; in processCallArgs()
1425 unsigned NextFPR = PPC::F1; in processCallArgs()
1441 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1453 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1524 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::FRSP), in finishCall()
1533 SourcePhysReg -= PPC::X0 - PPC::R0; in finishCall()
1534 ResultReg = copyRegToRegClass(&PPC::GPRCRegClass, SourcePhysReg); in finishCall()
1658 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::NOP)); in fastLowerCall()
1665 TII.get(PPC::BL8_NOP)); in fastLowerCall()
1677 MIB.addReg(PPC::X2, RegState::Implicit); in fastLowerCall()
1767 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1776 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1794 TII.get(PPC::BLR8)); in SelectRet()
1816 Opc = (DestVT == MVT::i32) ? PPC::EXTSB : PPC::EXTSB8_32_64; in PPCEmitIntExt()
1818 Opc = (DestVT == MVT::i32) ? PPC::EXTSH : PPC::EXTSH8_32_64; in PPCEmitIntExt()
1821 Opc = PPC::EXTSW_32_64; in PPCEmitIntExt()
1835 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::RLWINM), in PPCEmitIntExt()
1849 TII.get(PPC::RLDICL_32_64), DestReg) in PPCEmitIntExt()
1862 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::MTCTR8)) in SelectIndirectBr()
1864 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::BCTR8)); in SelectIndirectBr()
1891 SrcReg = copyRegToRegClass(&PPC::GPRCRegClass, SrcReg, 0, PPC::sub_32); in SelectTrunc()
1925 (DestVT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in SelectIntExt()
1926 &PPC::GPRC_and_GPRC_NOR0RegClass)); in SelectIntExt()
2000 RC = ((VT == MVT::f32) ? &PPC::GPRCRegClass : &PPC::SPERCRegClass); in PPCMaterializeFP()
2002 RC = ((VT == MVT::f32) ? &PPC::F4RCRegClass : &PPC::F8RCRegClass); in PPCMaterializeFP()
2014 Opc = ((VT == MVT::f32) ? PPC::SPELWZ : PPC::EVLDD); in PPCMaterializeFP()
2016 Opc = ((VT == MVT::f32) ? PPC::LFS : PPC::LFD); in PPCMaterializeFP()
2018 Register TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP()
2023 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtocCPT), in PPCMaterializeFP()
2025 .addConstantPoolIndex(Idx).addReg(PPC::X2); in PPCMaterializeFP()
2030 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ADDIStocHA8), in PPCMaterializeFP()
2031 TmpReg).addReg(PPC::X2).addConstantPoolIndex(Idx); in PPCMaterializeFP()
2035 Register TmpReg2 = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP()
2036 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtocL), in PPCMaterializeFP()
2059 const TargetRegisterClass *RC = &PPC::G8RC_and_G8RC_NOX0RegClass; in PPCMaterializeGV()
2084 IsAIXTocData ? TII.get(PPC::ADDItoc8) : TII.get(PPC::LDtoc), DestReg); in PPCMaterializeGV()
2086 MIB.addReg(PPC::X2).addGlobalAddress(GV); in PPCMaterializeGV()
2088 MIB.addGlobalAddress(GV).addReg(PPC::X2); in PPCMaterializeGV()
2099 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ADDIStocHA8), in PPCMaterializeGV()
2100 HighPartReg).addReg(PPC::X2).addGlobalAddress(GV); in PPCMaterializeGV()
2104 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtocL), in PPCMaterializeGV()
2108 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ADDItocL8), in PPCMaterializeGV()
2126 bool IsGPRC = RC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCMaterialize32BitInt()
2130 TII.get(IsGPRC ? PPC::LI : PPC::LI8), ResultReg) in PPCMaterialize32BitInt()
2136 TII.get(IsGPRC ? PPC::LIS : PPC::LIS8), TmpReg) in PPCMaterialize32BitInt()
2139 TII.get(IsGPRC ? PPC::ORI : PPC::ORI8), ResultReg) in PPCMaterialize32BitInt()
2144 TII.get(IsGPRC ? PPC::LIS : PPC::LIS8), ResultReg) in PPCMaterialize32BitInt()
2183 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::RLDICR), in PPCMaterialize64BitInt()
2191 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ORIS8), in PPCMaterialize64BitInt()
2198 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ORI8), in PPCMaterialize64BitInt()
2213 Register ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt()
2215 TII.get(CI->isZero() ? PPC::CRUNSET : PPC::CRSET), ImmReg); in PPCMaterializeInt()
2224 ((VT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass); in PPCMaterializeInt()
2232 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt()
2285 Register ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in fastMaterializeAlloca()
2286 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::ADDI8), in fastMaterializeAlloca()
2315 case PPC::RLDICL: in tryToFoldLoadIntoMI()
2316 case PPC::RLDICL_32_64: { in tryToFoldLoadIntoMI()
2326 case PPC::RLWINM: in tryToFoldLoadIntoMI()
2327 case PPC::RLWINM8: { in tryToFoldLoadIntoMI()
2336 case PPC::EXTSB: in tryToFoldLoadIntoMI()
2337 case PPC::EXTSB8: in tryToFoldLoadIntoMI()
2338 case PPC::EXTSB8_32_64: in tryToFoldLoadIntoMI()
2342 case PPC::EXTSH: in tryToFoldLoadIntoMI()
2343 case PPC::EXTSH8: in tryToFoldLoadIntoMI()
2344 case PPC::EXTSH8_32_64: { in tryToFoldLoadIntoMI()
2350 case PPC::EXTSW: in tryToFoldLoadIntoMI()
2351 case PPC::EXTSW_32: in tryToFoldLoadIntoMI()
2352 case PPC::EXTSW_32_64: { in tryToFoldLoadIntoMI()
2367 Subtarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in tryToFoldLoadIntoMI()
2395 Register ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i()
2397 TII.get(Imm == 0 ? PPC::CRUNSET : PPC::CRSET), ImmReg); in fastEmit_i()
2405 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in fastEmit_i()
2406 &PPC::GPRCRegClass); in fastEmit_i()
2428 if (MachineInstOpcode == PPC::ADDI) in fastEmitInst_ri()
2429 MRI.setRegClass(Op0, &PPC::GPRC_and_GPRC_NOR0RegClass); in fastEmitInst_ri()
2430 else if (MachineInstOpcode == PPC::ADDI8) in fastEmitInst_ri()
2431 MRI.setRegClass(Op0, &PPC::G8RC_and_G8RC_NOX0RegClass); in fastEmitInst_ri()
2434 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_ri()
2435 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_ri()
2447 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_r()
2448 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_r()
2460 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_rr()
2461 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_rr()
2468 FastISel *PPC::createFastISel(FunctionLoweringInfo &FuncInfo, in createFastISel()