143     MachineInstr *DefInst = MO.getParent();  in checkADDrr()  local
144     unsigned Opcode = DefInst->getOpcode();  in checkADDrr()
156     const MachineOperand &ImmOp = DefInst->getOperand(2);  in checkADDrr()
164       const MachineOperand &Opnd = DefInst->getOperand(0);  in checkADDrr()
169     BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp))  in checkADDrr()
170         .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp)  in checkADDrr()
172     DefInst->eraseFromParent();  in checkADDrr()
333       MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg);  in removeLD()  local
334       if (!DefInst)  in removeLD()
337       if (DefInst->getOpcode() != BPF::LD_imm64)  in removeLD()
340       const MachineOperand &MO = DefInst->getOperand(1);  in removeLD()