Lines Matching refs:ST
79 const GCNSubtarget &ST) { in getComputePGMRSrc1Reg() argument
87 if (ST.hasDX10ClampMode()) in getComputePGMRSrc1Reg()
90 if (ST.hasIEEEMode()) in getComputePGMRSrc1Reg()
93 if (ST.hasRrWGMode()) in getComputePGMRSrc1Reg()
100 CallingConv::ID CC, const GCNSubtarget &ST) { in getPGMRSrc1Reg() argument
106 if (ST.hasDX10ClampMode()) in getPGMRSrc1Reg()
109 if (ST.hasIEEEMode()) in getPGMRSrc1Reg()
112 if (ST.hasRrWGMode()) in getPGMRSrc1Reg()
164 const MCExpr *SIProgramInfo::getComputePGMRSrc1(const GCNSubtarget &ST, in getComputePGMRSrc1() argument
166 uint64_t Reg = getComputePGMRSrc1Reg(*this, ST); in getComputePGMRSrc1()
175 const GCNSubtarget &ST, in getPGMRSrc1() argument
178 return getComputePGMRSrc1(ST, Ctx); in getPGMRSrc1()
181 uint64_t Reg = getPGMRSrc1Reg(*this, CC, ST); in getPGMRSrc1()