Lines Matching refs:OperandSemantics

187                                 AMDGPU::OperandSemantics Sema,  in decodeSrcOp()
208                      false, 0, AMDGPU::OperandSemantics::INT, Decoder);  in decodeAV10()
217                      AMDGPU::OperandSemantics::INT, Decoder);  in decodeSrcReg9()
227                      AMDGPU::OperandSemantics::INT, Decoder);  in decodeSrcA9()
237                      AMDGPU::OperandSemantics::INT, Decoder);  in decodeSrcAV10()
246           unsigned OperandSemantics>
251                      (AMDGPU::OperandSemantics)OperandSemantics, Decoder);  in decodeSrcRegOrImm9()
257           unsigned OperandSemantics>
262                      (AMDGPU::OperandSemantics)OperandSemantics, Decoder);  in decodeSrcRegOrImmA9()
266           unsigned OperandSemantics>
271                      (AMDGPU::OperandSemantics)OperandSemantics, Decoder);  in decodeSrcRegOrImmDeferred9()
438                                       AMDGPU::OperandSemantics::FP64));  in decodeOperand_VSrc_f64()
1387 static int64_t getInlineImmVal16(unsigned Imm, AMDGPU::OperandSemantics Sema) {  in getInlineImmVal16()
1388   return (Sema == AMDGPU::OperandSemantics::BF16) ? getInlineImmValBF16(Imm)  in getInlineImmVal16()
1393                                             AMDGPU::OperandSemantics Sema) {  in decodeFPImmed()
1523                                           AMDGPU::OperandSemantics Sema) const {  in decodeSrcOp()
1542                                        AMDGPU::OperandSemantics Sema) const {  in decodeNonVGPRSrcOp()
1569     return decodeLiteralConstant(Sema == AMDGPU::OperandSemantics::FP64);  in decodeNonVGPRSrcOp()
1669                                   AMDGPU::OperandSemantics Sema) const {  in decodeSDWASrc()
1710   return decodeSDWASrc(OPW16, Val, 16, AMDGPU::OperandSemantics::FP16);  in decodeSDWASrc16()
1714   return decodeSDWASrc(OPW32, Val, 32, AMDGPU::OperandSemantics::FP32);  in decodeSDWASrc32()