Lines Matching refs:AMDGPUDisassembler
63 AMDGPUDisassembler::AMDGPUDisassembler(const MCSubtargetInfo &STI, in AMDGPUDisassembler() function in AMDGPUDisassembler
81 void AMDGPUDisassembler::setABIVersion(unsigned Version) { in setABIVersion()
107 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSOPPBrTarget()
121 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSMEMOffset()
135 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeBoolReg()
142 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeSplitBarrier()
148 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeDpp8FI()
156 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
167 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
177 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
179 DAsm->decodeSrcOp(AMDGPUDisassembler::OpWidth, EncImm, \
184 AMDGPUDisassembler::OpWidthTy OpWidth, in decodeSrcOp()
190 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeSrcOp()
204 template <AMDGPUDisassembler::OpWidthTy OpWidth>
212 template <AMDGPUDisassembler::OpWidthTy OpWidth>
223 template <AMDGPUDisassembler::OpWidthTy OpWidth>
232 template <AMDGPUDisassembler::OpWidthTy OpWidth>
245 template <AMDGPUDisassembler::OpWidthTy OpWidth, unsigned ImmWidth,
256 template <AMDGPUDisassembler::OpWidthTy OpWidth, unsigned ImmWidth,
265 template <AMDGPUDisassembler::OpWidthTy OpWidth, unsigned ImmWidth,
316 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DECODE_OPERAND_REG_8()
327 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DecodeVGPR_16_Lo128RegisterClass()
336 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrcT16_Lo128()
343 return addOperand(Inst, DAsm->decodeNonVGPRSrcOp(AMDGPUDisassembler::OPW16, in decodeOperand_VSrcT16_Lo128()
352 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrcT16()
359 return addOperand(Inst, DAsm->decodeNonVGPRSrcOp(AMDGPUDisassembler::OPW16, in decodeOperand_VSrcT16()
366 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_KImmFP()
372 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperandVOPDDstY()
391 AMDGPUDisassembler::OpWidthTy Opw, in decodeAVLdSt()
393 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeAVLdSt()
424 template <AMDGPUDisassembler::OpWidthTy Opw>
435 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrc_f64()
437 DAsm->decodeSrcOp(AMDGPUDisassembler::OPW64, Imm, false, 64, in decodeOperand_VSrc_f64()
451 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DECODE_SDWA()
480 DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size, in getInstruction()
751 void AMDGPUDisassembler::convertEXPInst(MCInst &MI) const { in convertEXPInst()
760 void AMDGPUDisassembler::convertVINTERPInst(MCInst &MI) const { in convertVINTERPInst()
775 void AMDGPUDisassembler::convertSDWAInst(MCInst &MI) const { in convertSDWAInst()
833 void AMDGPUDisassembler::convertTrue16OpSel(MCInst &MI) const { in convertTrue16OpSel()
868 bool AMDGPUDisassembler::isMacDPP(MCInst &MI) const { in isMacDPP()
888 void AMDGPUDisassembler::convertMacDPPInst(MCInst &MI) const { in convertMacDPPInst()
895 void AMDGPUDisassembler::convertDPP8Inst(MCInst &MI) const { in convertDPP8Inst()
924 void AMDGPUDisassembler::convertVOP3DPPInst(MCInst &MI) const { in convertVOP3DPPInst()
945 void AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const { in convertMIMGInst()
1094 void AMDGPUDisassembler::convertVOP3PDPPInst(MCInst &MI) const { in convertVOP3PDPPInst()
1122 void AMDGPUDisassembler::convertVOPCDPPInst(MCInst &MI) const { in convertVOPCDPPInst()
1141 void AMDGPUDisassembler::convertFMAanyK(MCInst &MI, int ImmLitIdx) const { in convertFMAanyK()
1159 const char* AMDGPUDisassembler::getRegClassName(unsigned RegClassID) const { in getRegClassName()
1165 MCOperand AMDGPUDisassembler::errOperand(unsigned V, in errOperand()
1175 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const { in createRegOperand()
1180 MCOperand AMDGPUDisassembler::createRegOperand(unsigned RegClassID, in createRegOperand()
1190 MCOperand AMDGPUDisassembler::createSRegOperand(unsigned SRegClassID, in createSRegOperand()
1239 MCOperand AMDGPUDisassembler::createVGPR16Operand(unsigned RegIdx, in createVGPR16Operand()
1247 AMDGPUDisassembler::decodeMandatoryLiteralConstant(unsigned Val) const { in decodeMandatoryLiteralConstant()
1260 MCOperand AMDGPUDisassembler::decodeLiteralConstant(bool ExtendFP64) const { in decodeLiteralConstant()
1277 MCOperand AMDGPUDisassembler::decodeIntImmed(unsigned Imm) { in decodeIntImmed()
1392 MCOperand AMDGPUDisassembler::decodeFPImmed(unsigned ImmWidth, unsigned Imm, in decodeFPImmed()
1414 unsigned AMDGPUDisassembler::getVgprClassId(const OpWidthTy Width) const { in getVgprClassId()
1439 unsigned AMDGPUDisassembler::getAgprClassId(const OpWidthTy Width) const { in getAgprClassId()
1465 unsigned AMDGPUDisassembler::getSgprClassId(const OpWidthTy Width) const { in getSgprClassId()
1489 unsigned AMDGPUDisassembler::getTtmpClassId(const OpWidthTy Width) const { in getTtmpClassId()
1511 int AMDGPUDisassembler::getTTmpIdx(unsigned Val) const { in getTTmpIdx()
1520 MCOperand AMDGPUDisassembler::decodeSrcOp(const OpWidthTy Width, unsigned Val, in decodeSrcOp()
1540 AMDGPUDisassembler::decodeNonVGPRSrcOp(const OpWidthTy Width, unsigned Val, in decodeNonVGPRSrcOp()
1587 MCOperand AMDGPUDisassembler::decodeVOPDDstYOp(MCInst &Inst, in decodeVOPDDstYOp()
1595 auto Width = llvm::AMDGPUDisassembler::OPW32; in decodeVOPDDstYOp()
1599 MCOperand AMDGPUDisassembler::decodeSpecialReg32(unsigned Val) const { in decodeSpecialReg32()
1635 MCOperand AMDGPUDisassembler::decodeSpecialReg64(unsigned Val) const { in decodeSpecialReg64()
1667 AMDGPUDisassembler::decodeSDWASrc(const OpWidthTy Width, const unsigned Val, in decodeSDWASrc()
1709 MCOperand AMDGPUDisassembler::decodeSDWASrc16(unsigned Val) const { in decodeSDWASrc16()
1713 MCOperand AMDGPUDisassembler::decodeSDWASrc32(unsigned Val) const { in decodeSDWASrc32()
1717 MCOperand AMDGPUDisassembler::decodeSDWAVopcDst(unsigned Val) const { in decodeSDWAVopcDst()
1742 MCOperand AMDGPUDisassembler::decodeBoolReg(unsigned Val) const { in decodeBoolReg()
1748 MCOperand AMDGPUDisassembler::decodeSplitBarrier(unsigned Val) const { in decodeSplitBarrier()
1752 MCOperand AMDGPUDisassembler::decodeDpp8FI(unsigned Val) const { in decodeDpp8FI()
1758 MCOperand AMDGPUDisassembler::decodeVersionImm(unsigned Imm) const { in decodeVersionImm()
1793 bool AMDGPUDisassembler::isVI() const { in isVI()
1797 bool AMDGPUDisassembler::isGFX9() const { return AMDGPU::isGFX9(STI); } in isGFX9()
1799 bool AMDGPUDisassembler::isGFX90A() const { in isGFX90A()
1803 bool AMDGPUDisassembler::isGFX9Plus() const { return AMDGPU::isGFX9Plus(STI); } in isGFX9Plus()
1805 bool AMDGPUDisassembler::isGFX10() const { return AMDGPU::isGFX10(STI); } in isGFX10()
1807 bool AMDGPUDisassembler::isGFX10Plus() const { in isGFX10Plus()
1811 bool AMDGPUDisassembler::isGFX11() const { in isGFX11()
1815 bool AMDGPUDisassembler::isGFX11Plus() const { in isGFX11Plus()
1819 bool AMDGPUDisassembler::isGFX12() const { in isGFX12()
1823 bool AMDGPUDisassembler::isGFX12Plus() const { in isGFX12Plus()
1827 bool AMDGPUDisassembler::hasArchitectedFlatScratch() const { in hasArchitectedFlatScratch()
1831 bool AMDGPUDisassembler::hasKernargPreload() const { in hasKernargPreload()
1891 Expected<bool> AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1( in decodeCOMPUTE_PGM_RSRC1()
1999 Expected<bool> AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC2( in decodeCOMPUTE_PGM_RSRC2()
2047 Expected<bool> AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC3( in decodeCOMPUTE_PGM_RSRC3()
2160 Expected<bool> AMDGPUDisassembler::decodeKernelDescriptorDirective( in decodeKernelDescriptorDirective()
2312 Expected<bool> AMDGPUDisassembler::decodeKernelDescriptor( in decodeKernelDescriptor()
2352 Expected<bool> AMDGPUDisassembler::onSymbolStart(SymbolInfoTy &Symbol, in onSymbolStart()
2379 const MCExpr *AMDGPUDisassembler::createConstantSymbolExpr(StringRef Id, in createConstantSymbolExpr()
2451 return new AMDGPUDisassembler(STI, Ctx, T.createMCInstrInfo()); in createAMDGPUDisassembler()