43 AMDGPUInstructionSelector::AMDGPUInstructionSelector(  in AMDGPUInstructionSelector()  function in AMDGPUInstructionSelector
58 const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }  in getName()
60 void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,  in setupMF()
77 bool AMDGPUInstructionSelector::isVCC(Register Reg,  in isVCC()
99 bool AMDGPUInstructionSelector::constrainCopyLikeIntrin(MachineInstr &MI,  in constrainCopyLikeIntrin()
123 bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {  in selectCOPY()
205 bool AMDGPUInstructionSelector::selectPHI(MachineInstr &I) const {  in selectPHI()
243 AMDGPUInstructionSelector::getSubOperand64(MachineOperand &MO,  in getSubOperand64()
290 bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {  in selectG_AND_OR_XOR()
311 bool AMDGPUInstructionSelector::selectG_ADD_SUB(MachineInstr &I) const {  in selectG_ADD_SUB()
414 bool AMDGPUInstructionSelector::selectG_UADDO_USUBO_UADDE_USUBE(  in selectG_UADDO_USUBO_UADDE_USUBE()
474 bool AMDGPUInstructionSelector::selectG_AMDGPU_MAD_64_32(  in selectG_AMDGPU_MAD_64_32()
493 bool AMDGPUInstructionSelector::selectG_EXTRACT(MachineInstr &I) const {  in selectG_EXTRACT()
538 bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {  in selectG_MERGE_VALUES()
577 bool AMDGPUInstructionSelector::selectG_UNMERGE_VALUES(MachineInstr &MI) const {  in selectG_UNMERGE_VALUES()
622 bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR(MachineInstr &MI) const {  in selectG_BUILD_VECTOR()
771 bool AMDGPUInstructionSelector::selectG_IMPLICIT_DEF(MachineInstr &I) const {  in selectG_IMPLICIT_DEF()
786 bool AMDGPUInstructionSelector::selectG_INSERT(MachineInstr &I) const {  in selectG_INSERT()
845 bool AMDGPUInstructionSelector::selectG_SBFX_UBFX(MachineInstr &MI) const {  in selectG_SBFX_UBFX()
869 bool AMDGPUInstructionSelector::selectInterpP1F16(MachineInstr &MI) const {  in selectInterpP1F16()
919 bool AMDGPUInstructionSelector::selectWritelane(MachineInstr &MI) const {  in selectWritelane()
973 bool AMDGPUInstructionSelector::selectDivScale(MachineInstr &MI) const {  in selectDivScale()
1012 bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I) const {  in selectG_INTRINSIC()
1186 int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,  in getS_CMPOpcode()
1298 bool AMDGPUInstructionSelector::selectG_ICMP_or_FCMP(MachineInstr &I) const {  in selectG_ICMP_or_FCMP()
1343 bool AMDGPUInstructionSelector::selectIntrinsicCmp(MachineInstr &I) const {  in selectIntrinsicCmp()
1401 bool AMDGPUInstructionSelector::selectBallot(MachineInstr &I) const {  in selectBallot()
1450 bool AMDGPUInstructionSelector::selectRelocConstant(MachineInstr &I) const {  in selectRelocConstant()
1474 bool AMDGPUInstructionSelector::selectGroupStaticSize(MachineInstr &I) const {  in selectGroupStaticSize()
1501 bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {  in selectReturnAddress()
1539 bool AMDGPUInstructionSelector::selectEndCfIntrinsic(MachineInstr &MI) const {  in selectEndCfIntrinsic()
1554 bool AMDGPUInstructionSelector::selectDSOrderedIntrinsic(  in selectDSOrderedIntrinsic()
1637 bool AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,  in selectDSGWSIntrinsic()
1728 bool AMDGPUInstructionSelector::selectDSAppendConsume(MachineInstr &MI,  in selectDSAppendConsume()
1760 bool AMDGPUInstructionSelector::selectSBarrier(MachineInstr &MI) const {  in selectSBarrier()
1800 bool AMDGPUInstructionSelector::selectImageIntrinsic(  in selectImageIntrinsic()
2042 bool AMDGPUInstructionSelector::selectDSBvhStackIntrinsic(  in selectDSBvhStackIntrinsic()
2067 bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(  in selectG_INTRINSIC_W_SIDE_EFFECTS()
2121 bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {  in selectG_SELECT()
2193 bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {  in selectG_TRUNC()
2327 const RegisterBank *AMDGPUInstructionSelector::getArtifactRegBank(  in getArtifactRegBank()
2340 bool AMDGPUInstructionSelector::selectG_SZA_EXT(MachineInstr &I) const {  in selectG_SZA_EXT()
2501 bool AMDGPUInstructionSelector::selectG_FPEXT(MachineInstr &I) const {  in selectG_FPEXT()
2526 bool AMDGPUInstructionSelector::selectG_CONSTANT(MachineInstr &I) const {  in selectG_CONSTANT()
2609 bool AMDGPUInstructionSelector::selectG_FNEG(MachineInstr &MI) const {  in selectG_FNEG()
2666 bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const {  in selectG_FABS()
2712 void AMDGPUInstructionSelector::getAddrModeInfo(const MachineInstr &Load,  in getAddrModeInfo()
2748 bool AMDGPUInstructionSelector::isSGPR(Register Reg) const {  in isSGPR()
2752 bool AMDGPUInstructionSelector::isInstrUniform(const MachineInstr &MI) const {  in isInstrUniform()
2778 bool AMDGPUInstructionSelector::hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const {  in hasVgprParts()
2786 void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {  in initM0()
2799 bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(  in selectG_LOAD_STORE_ATOMICRMW()
2826 bool AMDGPUInstructionSelector::selectG_BRCOND(MachineInstr &I) const {  in selectG_BRCOND()
2883 bool AMDGPUInstructionSelector::selectG_GLOBAL_VALUE(  in selectG_GLOBAL_VALUE()
2896 bool AMDGPUInstructionSelector::selectG_PTRMASK(MachineInstr &I) const {  in selectG_PTRMASK()
3035 bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(  in selectG_EXTRACT_VECTOR_ELT()
3112 bool AMDGPUInstructionSelector::selectG_INSERT_VECTOR_ELT(  in selectG_INSERT_VECTOR_ELT()
3185 bool AMDGPUInstructionSelector::selectBufferLoadLds(MachineInstr &MI) const {  in selectBufferLoadLds()
3298 bool AMDGPUInstructionSelector::selectGlobalLoadLds(MachineInstr &MI) const{  in selectGlobalLoadLds()
3380 bool AMDGPUInstructionSelector::selectBVHIntrinsic(MachineInstr &MI) const{  in selectBVHIntrinsic()
3387 bool AMDGPUInstructionSelector::selectSMFMACIntrin(MachineInstr &MI) const {  in selectSMFMACIntrin()
3446 bool AMDGPUInstructionSelector::selectWaveAddress(MachineInstr &MI) const {  in selectWaveAddress()
3474 bool AMDGPUInstructionSelector::selectStackRestore(MachineInstr &MI) const {  in selectStackRestore()
3501 bool AMDGPUInstructionSelector::select(MachineInstr &I) {  in select()
3650 AMDGPUInstructionSelector::selectVCSRC(MachineOperand &Root) const {  in selectVCSRC()
3658 AMDGPUInstructionSelector::selectVOP3ModsImpl(MachineOperand &Root,  in selectVOP3ModsImpl()
3691 Register AMDGPUInstructionSelector::copyToVGPRIfSrcFolded(  in copyToVGPRIfSrcFolded()
3714 AMDGPUInstructionSelector::selectVSRC0(MachineOperand &Root) const {  in selectVSRC0()
3721 AMDGPUInstructionSelector::selectVOP3Mods0(MachineOperand &Root) const {  in selectVOP3Mods0()
3737 AMDGPUInstructionSelector::selectVOP3BMods0(MachineOperand &Root) const {  in selectVOP3BMods0()
3755 AMDGPUInstructionSelector::selectVOP3OMods(MachineOperand &Root) const {  in selectVOP3OMods()
3764 AMDGPUInstructionSelector::selectVOP3Mods(MachineOperand &Root) const {  in selectVOP3Mods()
3778 AMDGPUInstructionSelector::selectVOP3ModsNonCanonicalizing(  in selectVOP3ModsNonCanonicalizing()
3793 AMDGPUInstructionSelector::selectVOP3BMods(MachineOperand &Root) const {  in selectVOP3BMods()
3808 AMDGPUInstructionSelector::selectVOP3NoMods(MachineOperand &Root) const {  in selectVOP3NoMods()
3819 AMDGPUInstructionSelector::selectVOP3PModsImpl(  in selectVOP3PModsImpl()
3845 AMDGPUInstructionSelector::selectVOP3PMods(MachineOperand &Root) const {  in selectVOP3PMods()
3860 AMDGPUInstructionSelector::selectVOP3PModsDOT(MachineOperand &Root) const {  in selectVOP3PModsDOT()
3875 AMDGPUInstructionSelector::selectVOP3PModsNeg(MachineOperand &Root) const {  in selectVOP3PModsNeg()
3890 AMDGPUInstructionSelector::selectWMMAOpSelVOP3PMods(  in selectWMMAOpSelVOP3PMods()
3962 AMDGPUInstructionSelector::selectWMMAModsF32NegAbs(MachineOperand &Root) const {  in selectWMMAModsF32NegAbs()
3993 AMDGPUInstructionSelector::selectWMMAModsF16Neg(MachineOperand &Root) const {  in selectWMMAModsF16Neg()
4019 AMDGPUInstructionSelector::selectWMMAModsF16NegAbs(MachineOperand &Root) const {  in selectWMMAModsF16NegAbs()
4052 AMDGPUInstructionSelector::selectWMMAVISrc(MachineOperand &Root) const {  in selectWMMAVISrc()
4077 AMDGPUInstructionSelector::selectSWMMACIndex8(MachineOperand &Root) const {  in selectSWMMACIndex8()
4098 AMDGPUInstructionSelector::selectSWMMACIndex16(MachineOperand &Root) const {  in selectSWMMACIndex16()
4120 AMDGPUInstructionSelector::selectVOP3OpSelMods(MachineOperand &Root) const {  in selectVOP3OpSelMods()
4133 AMDGPUInstructionSelector::selectVINTERPMods(MachineOperand &Root) const {  in selectVINTERPMods()
4151 AMDGPUInstructionSelector::selectVINTERPModsHi(MachineOperand &Root) const {  in selectVINTERPModsHi()
4168 bool AMDGPUInstructionSelector::selectSmrdOffset(MachineOperand &Root,  in selectSmrdOffset()
4250 AMDGPUInstructionSelector::selectSmrdImm(MachineOperand &Root) const {  in selectSmrdImm()
4261 AMDGPUInstructionSelector::selectSmrdImm32(MachineOperand &Root) const {  in selectSmrdImm32()
4282 AMDGPUInstructionSelector::selectSmrdSgpr(MachineOperand &Root) const {  in selectSmrdSgpr()
4292 AMDGPUInstructionSelector::selectSmrdSgprImm(MachineOperand &Root) const {  in selectSmrdSgprImm()
4304 AMDGPUInstructionSelector::selectFlatOffsetImpl(MachineOperand &Root,  in selectFlatOffsetImpl()
4330 AMDGPUInstructionSelector::selectFlatOffset(MachineOperand &Root) const {  in selectFlatOffset()
4340 AMDGPUInstructionSelector::selectGlobalOffset(MachineOperand &Root) const {  in selectGlobalOffset()
4350 AMDGPUInstructionSelector::selectScratchOffset(MachineOperand &Root) const {  in selectScratchOffset()
4361 AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {  in selectGlobalSAddr()
4472 AMDGPUInstructionSelector::selectScratchSAddr(MachineOperand &Root) const {  in selectScratchSAddr()
4531 bool AMDGPUInstructionSelector::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
4549 AMDGPUInstructionSelector::selectScratchSVAddr(MachineOperand &Root) const {  in selectScratchSVAddr()
4608 AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {  in selectMUBUFScratchOffen()
4687 bool AMDGPUInstructionSelector::isDSOffsetLegal(Register Base,  in isDSOffsetLegal()
4700 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,  in isDSOffset2Legal()
4726 bool AMDGPUInstructionSelector::isFlatScratchBaseLegal(Register Addr) const {  in isFlatScratchBaseLegal()
4757 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSV(Register Addr) const {  in isFlatScratchBaseLegalSV()
4775 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSVImm(  in isFlatScratchBaseLegalSVImm()
4805 bool AMDGPUInstructionSelector::isUnneededShiftMask(const MachineInstr &MI,  in isUnneededShiftMask()
4822 AMDGPUInstructionSelector::selectMUBUFScratchOffset(  in selectMUBUFScratchOffset()
4885 AMDGPUInstructionSelector::selectDS1Addr1OffsetImpl(MachineOperand &Root) const {  in selectDS1Addr1OffsetImpl()
4915 AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const {  in selectDS1Addr1Offset()
4926 AMDGPUInstructionSelector::selectDS64Bit4ByteAligned(MachineOperand &Root) const {  in selectDS64Bit4ByteAligned()
4931 AMDGPUInstructionSelector::selectDS128Bit8ByteAligned(MachineOperand &Root) const {  in selectDS128Bit8ByteAligned()
4936 AMDGPUInstructionSelector::selectDSReadWrite2(MachineOperand &Root,  in selectDSReadWrite2()
4949 AMDGPUInstructionSelector::selectDSReadWrite2Impl(MachineOperand &Root,  in selectDSReadWrite2Impl()
4985 AMDGPUInstructionSelector::getPtrBaseWithConstantOffset(  in getPtrBaseWithConstantOffset()
5066 AMDGPUInstructionSelector::MUBUFAddressData
5067 AMDGPUInstructionSelector::parseMUBUFAddress(Register Src) const {  in parseMUBUFAddress()
5098 bool AMDGPUInstructionSelector::shouldUseAddr64(MUBUFAddressData Addr) const {  in shouldUseAddr64()
5111 void AMDGPUInstructionSelector::splitIllegalMUBUFOffset(  in splitIllegalMUBUFOffset()
5124 bool AMDGPUInstructionSelector::selectMUBUFAddr64Impl(  in selectMUBUFAddr64Impl()
5175 bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl(  in selectMUBUFOffsetImpl()
5201 AMDGPUInstructionSelector::selectMUBUFAddr64(MachineOperand &Root) const {  in selectMUBUFAddr64()
5237 AMDGPUInstructionSelector::selectMUBUFOffset(MachineOperand &Root) const {  in selectMUBUFOffset()
5265 AMDGPUInstructionSelector::selectBUFSOffset(MachineOperand &Root) const {  in selectBUFSOffset()
5286 AMDGPUInstructionSelector::selectSMRDBufferImm(MachineOperand &Root) const {  in selectSMRDBufferImm()
5300 AMDGPUInstructionSelector::selectSMRDBufferImm32(MachineOperand &Root) const {  in selectSMRDBufferImm32()
5316 AMDGPUInstructionSelector::selectSMRDBufferSgprImm(MachineOperand &Root) const {  in selectSMRDBufferSgprImm()
5390 AMDGPUInstructionSelector::selectVOP3PMadMixModsImpl(MachineOperand &Root,  in selectVOP3PMadMixModsImpl()
5455 AMDGPUInstructionSelector::selectVOP3PMadMixModsExt(  in selectVOP3PMadMixModsExt()
5471 AMDGPUInstructionSelector::selectVOP3PMadMixMods(MachineOperand &Root) const {  in selectVOP3PMadMixMods()
5483 bool AMDGPUInstructionSelector::selectSBarrierSignalIsfirst(  in selectSBarrierSignalIsfirst()
5539 bool AMDGPUInstructionSelector::selectNamedBarrierInst(  in selectNamedBarrierInst()
5600 bool AMDGPUInstructionSelector::selectSBarrierLeave(MachineInstr &I) const {  in selectSBarrierLeave()
5613 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,  in renderTruncImm32()
5621 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,  in renderNegateImm()
5629 void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,  in renderBitcastImm()
5643 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,  in renderPopcntImm()
5653 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB,  in renderTruncTImm()
5659 void AMDGPUInstructionSelector::renderOpSelTImm(MachineInstrBuilder &MIB,  in renderOpSelTImm()
5666 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,  in renderExtractCPol()
5675 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB,  in renderExtractSWZ()
5685 void AMDGPUInstructionSelector::renderExtractCpolSetGLC(  in renderExtractCpolSetGLC()
5694 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,  in renderFrameIndex()
5700 void AMDGPUInstructionSelector::renderFPPow2ToExponent(MachineInstrBuilder &MIB,  in renderFPPow2ToExponent()
5709 bool AMDGPUInstructionSelector::isInlineImmediate(const APInt &Imm) const {  in isInlineImmediate()
5713 bool AMDGPUInstructionSelector::isInlineImmediate(const APFloat &Imm) const {  in isInlineImmediate()