Lines Matching refs:mi
158 bool convertInstTo3Addr(MachineBasicBlock::iterator &mi,
164 bool rescheduleMIBelowKill(MachineBasicBlock::iterator &mi,
166 bool rescheduleKillAboveMI(MachineBasicBlock::iterator &mi,
169 bool tryInstructionTransform(MachineBasicBlock::iterator &mi,
787 MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, in convertInstTo3Addr() argument
789 MachineInstrSpan MIS(mi, MBB); in convertInstTo3Addr()
790 MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS); in convertInstTo3Addr()
794 LLVM_DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi); in convertInstTo3Addr()
798 if (auto OldInstrNum = mi->peekDebugInstrNum()) { in convertInstTo3Addr()
799 assert(mi->getNumExplicitDefs() == 1); in convertInstTo3Addr()
803 unsigned OldIdx = mi->defs().begin()->getOperandNo(); in convertInstTo3Addr()
812 MBB->erase(mi); // Nuke the old inst. in convertInstTo3Addr()
817 mi = NewMI; in convertInstTo3Addr()
818 nmi = std::next(mi); in convertInstTo3Addr()
908 MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, in rescheduleMIBelowKill() argument
915 MachineInstr *MI = &*mi; in rescheduleMIBelowKill()
1096 MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, in rescheduleKillAboveMI() argument
1103 MachineInstr *MI = &*mi; in rescheduleKillAboveMI()
1166 make_range(mi, MachineBasicBlock::iterator(KillMI))) { in rescheduleKillAboveMI()
1211 MachineBasicBlock::iterator InsertPos = mi; in rescheduleKillAboveMI()
1313 MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, in tryInstructionTransform() argument
1318 MachineInstr &MI = *mi; in tryInstructionTransform()
1346 if (!Commuted && EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) { in tryInstructionTransform()
1363 if (convertInstTo3Addr(mi, nmi, regA, regB, Dist)) { in tryInstructionTransform()
1376 if (EnableRescheduling && rescheduleKillAboveMI(mi, nmi, regB)) { in tryInstructionTransform()
1420 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1421 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1435 tryInstructionTransform(NewMI, mi, NewSrcIdx, NewDstIdx, Dist, true); in tryInstructionTransform()
1492 mi = NewMIs[1]; in tryInstructionTransform()
1849 for (MachineBasicBlock::iterator mi = MBB->begin(), me = MBB->end(); in run() local
1850 mi != me; ) { in run()
1851 MachineBasicBlock::iterator nmi = std::next(mi); in run()
1853 if (mi->isDebugInstr()) { in run()
1854 mi = nmi; in run()
1860 if (mi->isRegSequence()) in run()
1861 eliminateRegSequence(mi); in run()
1863 DistanceMap.insert(std::make_pair(&*mi, ++Dist)); in run()
1865 processCopy(&*mi); in run()
1869 if (!collectTiedOperands(&*mi, TiedOperands)) { in run()
1870 removeClobberedSrcRegMap(&*mi); in run()
1871 mi = nmi; in run()
1877 LLVM_DEBUG(dbgs() << '\t' << *mi); in run()
1888 Register SrcReg = mi->getOperand(SrcIdx).getReg(); in run()
1889 Register DstReg = mi->getOperand(DstIdx).getReg(); in run()
1891 tryInstructionTransform(mi, nmi, SrcIdx, DstIdx, Dist, false)) { in run()
1895 removeClobberedSrcRegMap(&*mi); in run()
1896 mi = nmi; in run()
1902 if (mi->getOpcode() == TargetOpcode::STATEPOINT && in run()
1903 processStatepoint(&*mi, TiedOperands)) { in run()
1905 LLVM_DEBUG(dbgs() << "\t\trewrite to:\t" << *mi); in run()
1906 mi = nmi; in run()
1912 processTiedPairs(&*mi, TO.second, Dist); in run()
1913 LLVM_DEBUG(dbgs() << "\t\trewrite to:\t" << *mi); in run()
1917 if (mi->isInsertSubreg()) { in run()
1920 unsigned SubIdx = mi->getOperand(3).getImm(); in run()
1921 mi->removeOperand(3); in run()
1922 assert(mi->getOperand(0).getSubReg() == 0 && "Unexpected subreg idx"); in run()
1923 mi->getOperand(0).setSubReg(SubIdx); in run()
1924 mi->getOperand(0).setIsUndef(mi->getOperand(1).isUndef()); in run()
1925 mi->removeOperand(1); in run()
1926 mi->setDesc(TII->get(TargetOpcode::COPY)); in run()
1927 LLVM_DEBUG(dbgs() << "\t\tconvert to:\t" << *mi); in run()
1931 Register Reg = mi->getOperand(0).getReg(); in run()
1937 TRI->getSubRegIndexLaneMask(mi->getOperand(0).getSubReg()); in run()
1938 SlotIndex Idx = LIS->getInstructionIndex(*mi).getRegSlot(); in run()
1942 if (mi->getOperand(0).isUndef()) { in run()
1965 removeClobberedSrcRegMap(&*mi); in run()
1966 mi = nmi; in run()