174   const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOperandLatency()  argument
177   const unsigned InstrLatency = computeInstrLatency(DefMI);  in computeOperandLatency()
178   const unsigned DefaultDefLatency = TII->defaultDefLatency(SchedModel, *DefMI);  in computeOperandLatency()
186       OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx,  in computeOperandLatency()
190       unsigned DefClass = DefMI->getDesc().getSchedClass();  in computeOperandLatency()
201   const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOperandLatency()
202   unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);  in computeOperandLatency()
225   if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() &&  in computeOperandLatency()
226       !DefMI->getDesc().operands()[DefOperIdx].isOptionalDef() &&  in computeOperandLatency()
229            << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)";  in computeOperandLatency()
236   return DefMI->isTransient() ? 0 : DefaultDefLatency;  in computeOperandLatency()
274 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOutputLatency()  argument
287   Register Reg = DefMI->getOperand(DefOperIdx).getReg();  in computeOutputLatency()
288   const MachineFunction &MF = *DefMI->getMF();  in computeOutputLatency()
291     return computeInstrLatency(DefMI);  in computeOutputLatency()
296     const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOutputLatency()