398                                AllocationOrder &Order,  in tryAssign()  argument
402   for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) {  in tryAssign()
419     if (Order.isHint(Hint)) {  in tryAssign()
430       if (trySplitAroundHintReg(PhysHint, VirtReg, NewVRegs, Order))  in tryAssign()
447   MCRegister CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters);  in tryAssign()
532                                        const AllocationOrder &Order,  in getOrderLimit()  argument
534   unsigned OrderLimit = Order.getOrder().size();  in getOrderLimit()
548     if (RegCosts[Order.getOrder().back()] >= CostPerUseLimit) {  in getOrderLimit()
578                               AllocationOrder &Order,  in tryEvict()  argument
586       VirtReg, Order, CostPerUseLimit, FixedRegisters);  in tryEvict()
869                                              const AllocationOrder &Order) {  in calcGlobalSplitCost()  argument
1061                                     AllocationOrder &Order,  in tryRegionSplit()  argument
1083   unsigned BestCand = calculateRegionSplitCost(VirtReg, Order, BestCost,  in tryRegionSplit()
1095                                             AllocationOrder &Order,  in calculateRegionSplitCostAroundReg()  argument
1155   Cost += calcGlobalSplitCost(Cand, Order);  in calculateRegionSplitCostAroundReg()
1172                                             AllocationOrder &Order,  in calculateRegionSplitCost()  argument
1177   for (MCPhysReg PhysReg : Order) {  in calculateRegionSplitCost()
1182     calculateRegionSplitCostAroundReg(PhysReg, Order, BestCost, NumCands,  in calculateRegionSplitCost()
1234                                      AllocationOrder &Order) {  in trySplitAroundHintReg()  argument
1278   calculateRegionSplitCostAroundReg(Hint, Order, Cost, NumCands, BestCand);  in trySplitAroundHintReg()
1294                                  AllocationOrder &Order,  in tryBlockSplit()  argument
1415                                        AllocationOrder &Order,  in tryInstructionSplit()  argument
1568                                  AllocationOrder &Order,  in tryLocalSplit()  argument
1657   for (MCPhysReg PhysReg : Order) {  in tryLocalSplit()
1798 unsigned RAGreedy::trySplit(const LiveInterval &VirtReg, AllocationOrder &Order,  in trySplit()  argument
1810     Register PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs);  in trySplit()
1813     return tryInstructionSplit(VirtReg, Order, NewVRegs);  in trySplit()
1825     MCRegister PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs);  in trySplit()
1831   return tryBlockSplit(VirtReg, Order, NewVRegs);  in trySplit()
1955                                            AllocationOrder &Order,  in tryLastChanceRecoloring()  argument
1989   for (MCRegister PhysReg : Order) {  in tryLastChanceRecoloring()
2175     const LiveInterval &VirtReg, AllocationOrder &Order, MCRegister PhysReg,  in tryAssignCSRFirstTime()  argument
2195     unsigned BestCand = calculateRegionSplitCost(VirtReg, Order, BestCost,  in tryAssignCSRFirstTime()
2415   auto Order =  in selectOrSplitImpl()  local
2418           tryAssign(VirtReg, Order, NewVRegs, FixedRegisters)) {  in selectOrSplitImpl()
2424       MCRegister CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg,  in selectOrSplitImpl()
2446             tryEvict(VirtReg, Order, NewVRegs, CostPerUseLimit,  in selectOrSplitImpl()
2474     Register PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters);  in selectOrSplitImpl()
2482     return tryLastChanceRecoloring(VirtReg, Order, NewVRegs, FixedRegisters,  in selectOrSplitImpl()