204     bool LiveOut = false;            ///< Register is possibly live out.  member
384              MCPhysReg AssignedReg, bool Kill, bool LiveOut);
566                              bool LiveOut) {  in spill()  argument
598     if (LiveOut) {  in spill()
793                        findLiveVirtReg(VirtReg)->LiveOut;  in calcSpillCost()
1059         LRI->LiveOut = true;  in defineVirtReg()
1086   if (LRI->Reloaded || LRI->LiveOut) {  in defineVirtReg()
1090       LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut  in defineVirtReg()
1093       spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut);  in defineVirtReg()
1113     LRI->LiveOut = false;  in defineVirtReg()
1136         LRI->LiveOut = true;  in useVirtReg()
1236       if (I->LiveOut || I->Reloaded) {  in dumpState()
1238         if (I->LiveOut)  in dumpState()