Lines Matching refs:RegisterRef

100 bool PhysicalRegisterInfo::alias(RegisterRef RA, RegisterRef RB) const {  in alias()
107 assert(!RegisterRef::isUnitId(Reg) && "No units allowed"); in getAliasSet()
108 if (RegisterRef::isMaskId(Reg)) { in getAliasSet()
119 assert(RegisterRef::isRegId(Reg)); in getAliasSet()
126 std::set<RegisterId> PhysicalRegisterInfo::getUnits(RegisterRef RR) const { in getUnits()
165 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const { in mapTo()
169 return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask)); in mapTo()
175 return RegisterRef(R, M & RCM); in mapTo()
180 bool PhysicalRegisterInfo::equal_to(RegisterRef A, RegisterRef B) const { in equal_to()
216 bool PhysicalRegisterInfo::less(RegisterRef A, RegisterRef B) const { in less()
254 void PhysicalRegisterInfo::print(raw_ostream &OS, RegisterRef A) const { in print()
279 bool RegisterAggr::hasAliasOf(RegisterRef RR) const { in hasAliasOf()
292 bool RegisterAggr::hasCoverOf(RegisterRef RR) const { in hasCoverOf()
307 RegisterAggr &RegisterAggr::insert(RegisterRef RR) { in insert()
326 RegisterAggr &RegisterAggr::intersect(RegisterRef RR) { in intersect()
335 RegisterAggr &RegisterAggr::clear(RegisterRef RR) { in clear()
344 RegisterRef RegisterAggr::intersectWith(RegisterRef RR) const { in intersectWith()
348 return RegisterRef(); in intersectWith()
349 RegisterRef NR = T.makeRegRef(); in intersectWith()
354 RegisterRef RegisterAggr::clearIn(RegisterRef RR) const { in clearIn()
358 RegisterRef RegisterAggr::makeRegRef() const { in makeRegRef()
361 return RegisterRef(); in makeRegRef()
383 return RegisterRef(); in makeRegRef()
391 return RegisterRef(F, M); in makeRegRef()
397 RegisterRef R = RG.PRI.getRefForUnit(U); in ref_iterator()