140         set_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD0, 0x00ff00ff);  in reset_hw_threads()
141         set_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD1, w1);  in reset_hw_threads()
142         set_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD2, 0x80000000);  in reset_hw_threads()
239     reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_irq()
262     set_tima8(qts, target_pir, TM_QW3_HV_PHYS + TM_CPPR, 0xFF);  in test_hw_irq()
263     reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_irq()
298     reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0);  in test_pool_irq()
335     set_tima8(qts, target_pir, TM_QW3_HV_PHYS + TM_CPPR, 0xFF);  in test_pool_irq()
336     reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0);  in test_pool_irq()
366     qw3w0 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0);  in test_pull_thread_ctx_to_odd_thread_cl()
369     qw3b8 = get_tima8(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD2);  in test_pull_thread_ctx_to_odd_thread_cl()
378     memcpy(&cl_word, &cl_pair[XIVE_ODD_CL + TM_QW3_HV_PHYS + TM_WORD0], 4);  in test_pull_thread_ctx_to_odd_thread_cl()
385                     cl_pair[XIVE_ODD_CL + TM_QW3_HV_PHYS + TM_WORD2]);  in test_pull_thread_ctx_to_odd_thread_cl()
392     word2 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD2);  in test_pull_thread_ctx_to_odd_thread_cl()
425         reg32 = get_tima32(qts, chosen_one, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_group_irq()
453     set_tima8(qts, chosen_one, TM_QW3_HV_PHYS + TM_CPPR, 0xFF);  in test_hw_group_irq()
454     reg32 = get_tima32(qts, chosen_one, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_group_irq()
484         set_tima8(qts, i, TM_QW3_HV_PHYS + TM_CPPR, blocking_priority);  in test_hw_group_irq_backlog()
501         reg32 = get_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_group_irq_backlog()
511     set_tima8(qts, chosen_one, TM_QW3_HV_PHYS + TM_CPPR, priority + 1);  in test_hw_group_irq_backlog()
514     reg32 = get_tima32(qts, chosen_one, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_group_irq_backlog()
537     set_tima8(qts, chosen_one, TM_QW3_HV_PHYS + TM_CPPR, 0xFF);  in test_hw_group_irq_backlog()
538     reg32 = get_tima32(qts, chosen_one, TM_QW3_HV_PHYS + TM_WORD0);  in test_hw_group_irq_backlog()