59     qpci_io_writel(pdev, bar, 0, 0xccbbaa99);  in nvmetest_oob_cmb_test()
60     g_assert_cmpint(qpci_io_readb(pdev, bar, 0), ==, 0x99);  in nvmetest_oob_cmb_test()
61     g_assert_cmpint(qpci_io_readw(pdev, bar, 0), ==, 0xaa99);  in nvmetest_oob_cmb_test()
64     qpci_io_writel(pdev, bar, cmb_bar_size - 1, 0x44332211);  in nvmetest_oob_cmb_test()
65     g_assert_cmpint(qpci_io_readb(pdev, bar, cmb_bar_size - 1), ==, 0x11);  in nvmetest_oob_cmb_test()
66     g_assert_cmpint(qpci_io_readw(pdev, bar, cmb_bar_size - 1), !=, 0x2211);  in nvmetest_oob_cmb_test()
67     g_assert_cmpint(qpci_io_readl(pdev, bar, cmb_bar_size - 1), !=, 0x44332211);  in nvmetest_oob_cmb_test()
79     bar = qpci_iomap(pdev, 0, NULL);  in nvmetest_reg_read_test()
81     cap_lo = qpci_io_readl(pdev, bar, 0x0);  in nvmetest_reg_read_test()
82     g_assert_cmpint(NVME_CAP_MQES(cap_lo), ==, 0x7ff);  in nvmetest_reg_read_test()
84     cap_hi = qpci_io_readl(pdev, bar, 0x4);  in nvmetest_reg_read_test()
85     g_assert_cmpint(NVME_CAP_MPSMAX((uint64_t)cap_hi << 32), ==, 0x4);  in nvmetest_reg_read_test()
87     cap = qpci_io_readq(pdev, bar, 0x0);  in nvmetest_reg_read_test()
88     g_assert_cmpint(NVME_CAP_MQES(cap), ==, 0x7ff);  in nvmetest_reg_read_test()
89     g_assert_cmpint(NVME_CAP_MPSMAX(cap), ==, 0x4);  in nvmetest_reg_read_test()
105     qpci_io_writel(pdev, pmr_bar, 0, 0xccbbaa99);  in nvmetest_pmr_reg_test()
106     g_assert_cmpint(qpci_io_readb(pdev, pmr_bar, 0), !=, 0x99);  in nvmetest_pmr_reg_test()
107     g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), !=, 0xaa99);  in nvmetest_pmr_reg_test()
110     nvme_bar = qpci_iomap(pdev, 0, NULL);  in nvmetest_pmr_reg_test()
112     pmrcap = qpci_io_readl(pdev, nvme_bar, 0xe00);  in nvmetest_pmr_reg_test()
113     g_assert_cmpint(NVME_PMRCAP_RDS(pmrcap), ==, 0x1);  in nvmetest_pmr_reg_test()
114     g_assert_cmpint(NVME_PMRCAP_WDS(pmrcap), ==, 0x1);  in nvmetest_pmr_reg_test()
115     g_assert_cmpint(NVME_PMRCAP_BIR(pmrcap), ==, 0x4);  in nvmetest_pmr_reg_test()
116     g_assert_cmpint(NVME_PMRCAP_PMRWBM(pmrcap), ==, 0x2);  in nvmetest_pmr_reg_test()
117     g_assert_cmpint(NVME_PMRCAP_CMSS(pmrcap), ==, 0x1);  in nvmetest_pmr_reg_test()
120     qpci_io_writel(pdev, nvme_bar, 0xe04, 0x1);  in nvmetest_pmr_reg_test()
122     qpci_io_writel(pdev, pmr_bar, 0, 0x44332211);  in nvmetest_pmr_reg_test()
123     g_assert_cmpint(qpci_io_readb(pdev, pmr_bar, 0), ==, 0x11);  in nvmetest_pmr_reg_test()
124     g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), ==, 0x2211);  in nvmetest_pmr_reg_test()
125     g_assert_cmpint(qpci_io_readl(pdev, pmr_bar, 0), ==, 0x44332211);  in nvmetest_pmr_reg_test()
127     pmrsts = qpci_io_readl(pdev, nvme_bar, 0xe08);  in nvmetest_pmr_reg_test()
128     g_assert_cmpint(NVME_PMRSTS_NRDY(pmrsts), ==, 0x0);  in nvmetest_pmr_reg_test()
131     qpci_io_writel(pdev, nvme_bar, 0xe04, 0x0);  in nvmetest_pmr_reg_test()
133     qpci_io_writel(pdev, pmr_bar, 0, 0x88776655);  in nvmetest_pmr_reg_test()
134     g_assert_cmpint(qpci_io_readb(pdev, pmr_bar, 0), !=, 0x55);  in nvmetest_pmr_reg_test()
135     g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), !=, 0x6655);  in nvmetest_pmr_reg_test()
136     g_assert_cmpint(qpci_io_readl(pdev, pmr_bar, 0), !=, 0x88776655);  in nvmetest_pmr_reg_test()
138     pmrsts = qpci_io_readl(pdev, nvme_bar, 0xe08);  in nvmetest_pmr_reg_test()
139     g_assert_cmpint(NVME_PMRSTS_NRDY(pmrsts), ==, 0x1);  in nvmetest_pmr_reg_test()
155     add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });  in nvme_register_nodes()