Lines Matching full:port
86 uint8_t port; member
118 bool is_atapi(AHCIQState *ahci, uint8_t port) in is_atapi() argument
120 return ahci_px_rreg(ahci, port, AHCI_PX_SIG) == AHCI_SIGNATURE_CDROM; in is_atapi()
166 uint8_t port, slot; in ahci_clean_mem() local
168 for (port = 0; port < 32; ++port) { in ahci_clean_mem()
169 if (ahci->port[port].fb) { in ahci_clean_mem()
170 ahci_free(ahci, ahci->port[port].fb); in ahci_clean_mem()
171 ahci->port[port].fb = 0; in ahci_clean_mem()
173 if (ahci->port[port].clb) { in ahci_clean_mem()
175 ahci_destroy_command(ahci, port, slot); in ahci_clean_mem()
177 ahci_free(ahci, ahci->port[port].clb); in ahci_clean_mem()
178 ahci->port[port].clb = 0; in ahci_clean_mem()
197 * acts as a master port enabler mask. */ in ahci_pci_enable()
229 * PxCMD.ST Port Command: Start in ahci_hba_enable()
263 g_test_message("Initializing port %u", i); in ahci_hba_enable()
268 g_test_message("port is idle"); in ahci_hba_enable()
270 g_test_message("port needs to be idled"); in ahci_hba_enable()
273 /* The port has 500ms to disengage. */ in ahci_hba_enable()
278 g_test_message("port is now idle"); in ahci_hba_enable()
279 /* The spec does allow for possibly needing a PORT RESET in ahci_hba_enable()
280 * or HBA reset if we fail to idle the port. */ in ahci_hba_enable()
285 ahci->port[i].clb = ahci_alloc(ahci, num_cmd_slots * 0x20); in ahci_hba_enable()
286 qtest_memset(ahci->parent->qts, ahci->port[i].clb, 0x00, in ahci_hba_enable()
288 g_test_message("CLB: 0x%08" PRIx64, ahci->port[i].clb); in ahci_hba_enable()
289 ahci_px_wreg(ahci, i, AHCI_PX_CLB, ahci->port[i].clb); in ahci_hba_enable()
290 g_assert_cmphex(ahci->port[i].clb, ==, in ahci_hba_enable()
294 ahci->port[i].fb = ahci_alloc(ahci, 0x100); in ahci_hba_enable()
295 qtest_memset(ahci->parent->qts, ahci->port[i].fb, 0x00, 0x100); in ahci_hba_enable()
296 g_test_message("FB: 0x%08" PRIx64, ahci->port[i].fb); in ahci_hba_enable()
297 ahci_px_wreg(ahci, i, AHCI_PX_FB, ahci->port[i].fb); in ahci_hba_enable()
298 g_assert_cmphex(ahci->port[i].fb, ==, in ahci_hba_enable()
362 * Pick the first implemented and running port
389 * Clear a port's interrupts and status information prior to a test.
391 void ahci_port_clear(AHCIQState *ahci, uint8_t port) in ahci_port_clear() argument
395 /* Clear out this port's interrupts (ignore the init register d2h fis) */ in ahci_port_clear()
396 reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); in ahci_port_clear()
397 ahci_px_wreg(ahci, port, AHCI_PX_IS, reg); in ahci_port_clear()
398 g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0); in ahci_port_clear()
401 qtest_memset(ahci->parent->qts, ahci->port[port].fb, 0x00, 0x100); in ahci_port_clear()
405 * Check a port for errors.
409 uint8_t port = cmd->port; in ahci_port_check_error() local
414 reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); in ahci_port_check_error()
418 reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); in ahci_port_check_error()
425 reg = ahci_px_rreg(ahci, port, AHCI_PX_SERR); in ahci_port_check_error()
432 ahci_px_clr(ahci, port, AHCI_PX_CMD, AHCI_PX_CMD_ST); in ahci_port_check_error()
434 /* The port has 500ms to disengage. */ in ahci_port_check_error()
436 reg = ahci_px_rreg(ahci, port, AHCI_PX_CMD); in ahci_port_check_error()
440 reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); in ahci_port_check_error()
441 ahci_px_wreg(ahci, port, AHCI_PX_IS, reg); in ahci_port_check_error()
446 reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); in ahci_port_check_error()
450 ahci_px_set(ahci, port, AHCI_PX_CMD, AHCI_PX_CMD_ST); in ahci_port_check_error()
454 reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); in ahci_port_check_error()
466 uint8_t port = cmd->port; in ahci_port_check_interrupts() local
477 reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); in ahci_port_check_interrupts()
481 ahci_px_wreg(ahci, port, AHCI_PX_IS, cmd->interrupts); in ahci_port_check_interrupts()
482 g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0); in ahci_port_check_interrupts()
488 uint8_t port = cmd->port; in ahci_port_check_nonbusy() local
494 reg = ahci_px_rreg(ahci, port, AHCI_PX_SACT); in ahci_port_check_nonbusy()
505 reg = ahci_px_rreg(ahci, port, AHCI_PX_CI); in ahci_port_check_nonbusy()
513 reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); in ahci_port_check_nonbusy()
518 void ahci_port_check_d2h_sanity(AHCIQState *ahci, uint8_t port, uint8_t slot) in ahci_port_check_d2h_sanity() argument
523 qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x40, d2h, 0x20); in ahci_port_check_d2h_sanity()
526 reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); in ahci_port_check_d2h_sanity()
536 uint8_t port = cmd->port; in ahci_port_check_pio_sanity() local
541 qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x20, pio, 0x20); in ahci_port_check_pio_sanity()
567 ahci_get_command_header(ahci, cmd->port, cmd->slot, &cmdh); in ahci_port_check_cmd_sanity()
574 /* Get the command in #slot of port #port. */
575 void ahci_get_command_header(AHCIQState *ahci, uint8_t port, in ahci_get_command_header() argument
578 uint64_t ba = ahci->port[port].clb; in ahci_get_command_header()
588 /* Set the command in #slot of port #port. */
589 void ahci_set_command_header(AHCIQState *ahci, uint8_t port, in ahci_set_command_header() argument
593 uint64_t ba = ahci->port[port].clb; in ahci_set_command_header()
604 void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot) in ahci_destroy_command() argument
609 ahci_get_command_header(ahci, port, slot, &cmd); in ahci_destroy_command()
621 ahci_set_command_header(ahci, port, slot, &cmd); in ahci_destroy_command()
622 ahci->port[port].ctba[slot] = 0; in ahci_destroy_command()
623 ahci->port[port].prdtl[slot] = 0; in ahci_destroy_command()
642 unsigned ahci_pick_cmd(AHCIQState *ahci, uint8_t port) in ahci_pick_cmd() argument
648 reg = ahci_px_rreg(ahci, port, AHCI_PX_CI); in ahci_pick_cmd()
652 j = ((ahci->port[port].next + i) % 32); in ahci_pick_cmd()
656 ahci_destroy_command(ahci, port, j); in ahci_pick_cmd()
657 ahci->port[port].next = (j + 1) % 32; in ahci_pick_cmd()
677 * AHCI port.
680 * @port: The port number of the SATA device we wish
686 void ahci_exec(AHCIQState *ahci, uint8_t port, in ahci_exec() argument
722 ahci_command_commit(ahci, cmd, port); in ahci_exec()
751 AHCICommand *ahci_guest_io_halt(AHCIQState *ahci, uint8_t port, in ahci_guest_io_halt() argument
759 ahci_command_commit(ahci, cmd, port); in ahci_guest_io_halt()
778 void ahci_guest_io(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd, in ahci_guest_io() argument
788 ahci_command_commit(ahci, cmd, port); in ahci_guest_io()
808 void ahci_io(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd, in ahci_io() argument
824 ahci_guest_io(ahci, port, ide_cmd, ptr, bufsize, sector); in ahci_io()
951 void ahci_atapi_test_ready(AHCIQState *ahci, uint8_t port, in ahci_atapi_test_ready() argument
960 ahci_command_commit(ahci, cmd, port); in ahci_atapi_test_ready()
974 void ahci_atapi_get_sense(AHCIQState *ahci, uint8_t port, in ahci_atapi_get_sense() argument
986 ahci_exec(ahci, port, CMD_ATAPI_REQUEST_SENSE, &opts); in ahci_atapi_get_sense()
994 void ahci_atapi_eject(AHCIQState *ahci, uint8_t port) in ahci_atapi_eject() argument
1000 ahci_command_commit(ahci, cmd, port); in ahci_atapi_eject()
1006 void ahci_atapi_load(AHCIQState *ahci, uint8_t port) in ahci_atapi_load() argument
1012 ahci_command_commit(ahci, cmd, port); in ahci_atapi_load()
1186 void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port) in ahci_command_commit() argument
1192 /* This command is now tied to this port/command slot */ in ahci_command_commit()
1193 cmd->port = port; in ahci_command_commit()
1194 cmd->slot = ahci_pick_cmd(ahci, port); in ahci_command_commit()
1211 ahci_set_command_header(ahci, port, cmd->slot, &(cmd->header)); in ahci_command_commit()
1242 ahci->port[port].ctba[cmd->slot] = table_ptr; in ahci_command_commit()
1243 ahci->port[port].prdtl[cmd->slot] = prdtl; in ahci_command_commit()
1249 ahci_px_wreg(ahci, cmd->port, AHCI_PX_SACT, (1 << cmd->slot)); in ahci_command_issue_async()
1252 ahci_px_wreg(ahci, cmd->port, AHCI_PX_CI, (1 << cmd->slot)); in ahci_command_issue_async()
1261 #define RSET(REG, MASK) (BITSET(ahci_px_rreg(ahci, cmd->port, (REG)), (MASK))) in ahci_command_wait()
1281 uint8_t port = cmd->port; in ahci_command_verify() local
1288 ahci_port_check_d2h_sanity(ahci, port, slot); in ahci_command_verify()