2  * QTest testcase for DM163
35     /* Configure output mode for pin PB1 */  in rise_gpio_pin_dck()
37     /* Write 1 in ODR for PB1 */  in rise_gpio_pin_dck()
43     /* Configure output mode for pin PB1 */  in lower_gpio_pin_dck()
45     /* Write 0 in ODR for PB1 */  in lower_gpio_pin_dck()
51     /* Configure output mode for pin PC5 */  in rise_gpio_pin_selbk()
53     /* Write 1 in ODR for PC5 */  in rise_gpio_pin_selbk()
59     /* Configure output mode for pin PC5 */  in lower_gpio_pin_selbk()
61     /* Write 0 in ODR for PC5 */  in lower_gpio_pin_selbk()
67     /* Configure output mode for pin PC4 */  in rise_gpio_pin_lat_b()
69     /* Write 1 in ODR for PC4 */  in rise_gpio_pin_lat_b()
75     /* Configure output mode for pin PC4 */  in lower_gpio_pin_lat_b()
77     /* Write 0 in ODR for PC4 */  in lower_gpio_pin_lat_b()
83     /* Configure output mode for pin PC3 */  in rise_gpio_pin_rst_b()
85     /* Write 1 in ODR for PC3 */  in rise_gpio_pin_rst_b()
91     /* Configure output mode for pin PC3 */  in lower_gpio_pin_rst_b()
93     /* Write 0 in ODR for PC3 */  in lower_gpio_pin_rst_b()
99     /* Configure output mode for pin PA4 */  in rise_gpio_pin_sin()
101     /* Write 1 in ODR for PA4 */  in rise_gpio_pin_sin()
107     /* Configure output mode for pin PA4 */  in lower_gpio_pin_sin()
109     /* Write 0 in ODR for PA4 */  in lower_gpio_pin_sin()
128     for (int i = 0; i < width; i++) {  in test_dm163_bank()
133     for (int i = 0; i < width; i++) {  in test_dm163_bank()