Lines Matching full:r1
100 static void tci_args_rr(uint32_t insn, TCGReg *r0, TCGReg *r1) in tci_args_rr() argument
103 *r1 = extract32(insn, 12, 4); in tci_args_rr()
113 TCGReg *r1, MemOpIdx *m2) in tci_args_rrm() argument
116 *r1 = extract32(insn, 12, 4); in tci_args_rrm()
120 static void tci_args_rrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2) in tci_args_rrr() argument
123 *r1 = extract32(insn, 12, 4); in tci_args_rrr()
127 static void tci_args_rrs(uint32_t insn, TCGReg *r0, TCGReg *r1, int32_t *i2) in tci_args_rrs() argument
130 *r1 = extract32(insn, 12, 4); in tci_args_rrs()
134 static void tci_args_rrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrbb() argument
138 *r1 = extract32(insn, 12, 4); in tci_args_rrbb()
144 TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) in tci_args_rrrc() argument
147 *r1 = extract32(insn, 12, 4); in tci_args_rrrc()
152 static void tci_args_rrrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrrbb() argument
156 *r1 = extract32(insn, 12, 4); in tci_args_rrrbb()
163 TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) in tci_args_rrrr() argument
166 *r1 = extract32(insn, 12, 4); in tci_args_rrrr()
171 static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrrrrc() argument
175 *r1 = extract32(insn, 12, 4); in tci_args_rrrrrc()
350 TCGReg r0, r1, r2, r3, r4; in tcg_qemu_tb_exec() local
423 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); in tcg_qemu_tb_exec()
424 regs[r0] = tci_compare64(tci_uint64(regs[r2], regs[r1]), in tcg_qemu_tb_exec()
430 tci_args_rrrc(insn, &r0, &r1, &r2, &condition); in tcg_qemu_tb_exec()
431 regs[r0] = tci_compare64(regs[r1], regs[r2], condition); in tcg_qemu_tb_exec()
434 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); in tcg_qemu_tb_exec()
435 tmp32 = tci_compare64(regs[r1], regs[r2], condition); in tcg_qemu_tb_exec()
440 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
441 regs[r0] = regs[r1]; in tcg_qemu_tb_exec()
458 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
459 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
463 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
464 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
468 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
469 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
473 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
474 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
478 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
479 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
483 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
484 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
488 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
489 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
493 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
494 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
501 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
502 regs[r0] = regs[r1] + regs[r2]; in tcg_qemu_tb_exec()
505 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
506 regs[r0] = regs[r1] - regs[r2]; in tcg_qemu_tb_exec()
509 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
510 regs[r0] = regs[r1] * regs[r2]; in tcg_qemu_tb_exec()
513 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
514 regs[r0] = regs[r1] & regs[r2]; in tcg_qemu_tb_exec()
517 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
518 regs[r0] = regs[r1] | regs[r2]; in tcg_qemu_tb_exec()
521 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
522 regs[r0] = regs[r1] ^ regs[r2]; in tcg_qemu_tb_exec()
525 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
526 regs[r0] = regs[r1] & ~regs[r2]; in tcg_qemu_tb_exec()
529 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
530 regs[r0] = regs[r1] | ~regs[r2]; in tcg_qemu_tb_exec()
533 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
534 regs[r0] = ~(regs[r1] ^ regs[r2]); in tcg_qemu_tb_exec()
537 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
538 regs[r0] = ~(regs[r1] & regs[r2]); in tcg_qemu_tb_exec()
541 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
542 regs[r0] = ~(regs[r1] | regs[r2]); in tcg_qemu_tb_exec()
545 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
546 regs[r0] = -regs[r1]; in tcg_qemu_tb_exec()
549 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
550 regs[r0] = ~regs[r1]; in tcg_qemu_tb_exec()
553 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
554 regs[r0] = ctpop_tr(regs[r1]); in tcg_qemu_tb_exec()
557 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
558 t1 = regs[r1] + regs[r2]; in tcg_qemu_tb_exec()
559 carry = t1 < regs[r1]; in tcg_qemu_tb_exec()
563 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
564 regs[r0] = regs[r1] + regs[r2] + carry; in tcg_qemu_tb_exec()
567 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
569 t1 = regs[r1] + regs[r2] + 1; in tcg_qemu_tb_exec()
570 carry = t1 <= regs[r1]; in tcg_qemu_tb_exec()
572 t1 = regs[r1] + regs[r2]; in tcg_qemu_tb_exec()
573 carry = t1 < regs[r1]; in tcg_qemu_tb_exec()
578 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
579 carry = regs[r1] < regs[r2]; in tcg_qemu_tb_exec()
580 regs[r0] = regs[r1] - regs[r2]; in tcg_qemu_tb_exec()
583 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
584 regs[r0] = regs[r1] - regs[r2] - carry; in tcg_qemu_tb_exec()
587 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
589 carry = regs[r1] <= regs[r2]; in tcg_qemu_tb_exec()
590 regs[r0] = regs[r1] - regs[r2] - 1; in tcg_qemu_tb_exec()
592 carry = regs[r1] < regs[r2]; in tcg_qemu_tb_exec()
593 regs[r0] = regs[r1] - regs[r2]; in tcg_qemu_tb_exec()
597 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in tcg_qemu_tb_exec()
600 tci_write_reg64(regs, r1, r0, tmp64); in tcg_qemu_tb_exec()
602 muls64(®s[r0], ®s[r1], regs[r2], regs[r3]); in tcg_qemu_tb_exec()
606 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in tcg_qemu_tb_exec()
609 tci_write_reg64(regs, r1, r0, tmp64); in tcg_qemu_tb_exec()
611 mulu64(®s[r0], ®s[r1], regs[r2], regs[r3]); in tcg_qemu_tb_exec()
618 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
619 regs[r0] = (int32_t)regs[r1] / (int32_t)regs[r2]; in tcg_qemu_tb_exec()
622 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
623 regs[r0] = (uint32_t)regs[r1] / (uint32_t)regs[r2]; in tcg_qemu_tb_exec()
626 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
627 regs[r0] = (int32_t)regs[r1] % (int32_t)regs[r2]; in tcg_qemu_tb_exec()
630 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
631 regs[r0] = (uint32_t)regs[r1] % (uint32_t)regs[r2]; in tcg_qemu_tb_exec()
634 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
635 tmp32 = regs[r1]; in tcg_qemu_tb_exec()
639 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
640 tmp32 = regs[r1]; in tcg_qemu_tb_exec()
644 tci_args_rrrc(insn, &r0, &r1, &r2, &condition); in tcg_qemu_tb_exec()
645 regs[r0] = tci_compare32(regs[r1], regs[r2], condition); in tcg_qemu_tb_exec()
648 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); in tcg_qemu_tb_exec()
649 tmp32 = tci_compare32(regs[r1], regs[r2], condition); in tcg_qemu_tb_exec()
656 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
657 regs[r0] = regs[r1] << (regs[r2] % TCG_TARGET_REG_BITS); in tcg_qemu_tb_exec()
660 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
661 regs[r0] = regs[r1] >> (regs[r2] % TCG_TARGET_REG_BITS); in tcg_qemu_tb_exec()
664 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
665 regs[r0] = ((tcg_target_long)regs[r1] in tcg_qemu_tb_exec()
669 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
670 regs[r0] = rol32(regs[r1], regs[r2] & 31); in tcg_qemu_tb_exec()
673 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
674 regs[r0] = ror32(regs[r1], regs[r2] & 31); in tcg_qemu_tb_exec()
677 tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); in tcg_qemu_tb_exec()
678 regs[r0] = deposit_tr(regs[r1], pos, len, regs[r2]); in tcg_qemu_tb_exec()
681 tci_args_rrbb(insn, &r0, &r1, &pos, &len); in tcg_qemu_tb_exec()
682 regs[r0] = extract_tr(regs[r1], pos, len); in tcg_qemu_tb_exec()
685 tci_args_rrbb(insn, &r0, &r1, &pos, &len); in tcg_qemu_tb_exec()
686 regs[r0] = sextract_tr(regs[r1], pos, len); in tcg_qemu_tb_exec()
695 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
696 regs[r0] = bswap16(regs[r1]); in tcg_qemu_tb_exec()
699 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
700 regs[r0] = bswap32(regs[r1]); in tcg_qemu_tb_exec()
706 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
707 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
711 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
712 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
716 tci_args_rrs(insn, &r0, &r1, &ofs); in tcg_qemu_tb_exec()
717 ptr = (void *)(regs[r1] + ofs); in tcg_qemu_tb_exec()
724 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
725 regs[r0] = (int64_t)regs[r1] / (int64_t)regs[r2]; in tcg_qemu_tb_exec()
728 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
729 regs[r0] = (uint64_t)regs[r1] / (uint64_t)regs[r2]; in tcg_qemu_tb_exec()
732 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
733 regs[r0] = (int64_t)regs[r1] % (int64_t)regs[r2]; in tcg_qemu_tb_exec()
736 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
737 regs[r0] = (uint64_t)regs[r1] % (uint64_t)regs[r2]; in tcg_qemu_tb_exec()
740 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
741 regs[r0] = regs[r1] ? clz64(regs[r1]) : regs[r2]; in tcg_qemu_tb_exec()
744 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
745 regs[r0] = regs[r1] ? ctz64(regs[r1]) : regs[r2]; in tcg_qemu_tb_exec()
751 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
752 regs[r0] = rol64(regs[r1], regs[r2] & 63); in tcg_qemu_tb_exec()
755 tci_args_rrr(insn, &r0, &r1, &r2); in tcg_qemu_tb_exec()
756 regs[r0] = ror64(regs[r1], regs[r2] & 63); in tcg_qemu_tb_exec()
759 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
760 regs[r0] = (int32_t)regs[r1]; in tcg_qemu_tb_exec()
763 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
764 regs[r0] = (uint32_t)regs[r1]; in tcg_qemu_tb_exec()
767 tci_args_rr(insn, &r0, &r1); in tcg_qemu_tb_exec()
768 regs[r0] = bswap64(regs[r1]); in tcg_qemu_tb_exec()
793 tci_args_rrm(insn, &r0, &r1, &oi); in tcg_qemu_tb_exec()
794 taddr = regs[r1]; in tcg_qemu_tb_exec()
799 tci_args_rrm(insn, &r0, &r1, &oi); in tcg_qemu_tb_exec()
800 taddr = regs[r1]; in tcg_qemu_tb_exec()
806 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in tcg_qemu_tb_exec()
810 tci_write_reg64(regs, r1, r0, tmp64); in tcg_qemu_tb_exec()
815 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in tcg_qemu_tb_exec()
816 tmp64 = tci_uint64(regs[r1], regs[r0]); in tcg_qemu_tb_exec()
839 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", in str_r()
882 TCGReg r0, r1, r2, r3, r4; in print_insn_tci() local
925 tci_args_rrrc(insn, &r0, &r1, &r2, &c); in print_insn_tci()
927 op_name, str_r(r0), str_r(r1), str_r(r2), str_c(c)); in print_insn_tci()
956 tci_args_rrs(insn, &r0, &r1, &s2); in print_insn_tci()
958 op_name, str_r(r0), str_r(r1), s2); in print_insn_tci()
970 tci_args_rr(insn, &r0, &r1); in print_insn_tci()
972 op_name, str_r(r0), str_r(r1)); in print_insn_tci()
1011 tci_args_rrr(insn, &r0, &r1, &r2); in print_insn_tci()
1013 op_name, str_r(r0), str_r(r1), str_r(r2)); in print_insn_tci()
1017 tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); in print_insn_tci()
1019 op_name, str_r(r0), str_r(r1), str_r(r2), pos, len); in print_insn_tci()
1024 tci_args_rrbb(insn, &r0, &r1, &pos, &len); in print_insn_tci()
1026 op_name, str_r(r0), str_r(r1), pos, len); in print_insn_tci()
1032 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &c); in print_insn_tci()
1034 op_name, str_r(r0), str_r(r1), str_r(r2), in print_insn_tci()
1040 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in print_insn_tci()
1042 op_name, str_r(r0), str_r(r1), in print_insn_tci()
1048 tci_args_rrm(insn, &r0, &r1, &oi); in print_insn_tci()
1050 op_name, str_r(r0), str_r(r1), oi); in print_insn_tci()
1055 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in print_insn_tci()
1057 op_name, str_r(r0), str_r(r1), in print_insn_tci()