Lines Matching refs:TCGV_LOW
1428 tcg_gen_discard_i32(TCGV_LOW(arg)); in tcg_gen_discard_i64()
1447 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); in tcg_gen_mov_i64()
1458 tcg_gen_movi_i32(TCGV_LOW(ret), arg); in tcg_gen_movi_i64()
1468 tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld8u_i64()
1478 tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld8s_i64()
1479 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_ld8s_i64()
1488 tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld16u_i64()
1498 tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld16s_i64()
1499 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_ld16s_i64()
1508 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld32u_i64()
1518 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld32s_i64()
1519 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_ld32s_i64()
1533 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4); in tcg_gen_ld_i64()
1535 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); in tcg_gen_ld_i64()
1545 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st8_i64()
1554 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st16_i64()
1563 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st32_i64()
1573 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4); in tcg_gen_st_i64()
1575 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st_i64()
1585 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), in tcg_gen_add_i64()
1586 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); in tcg_gen_add_i64()
1595 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), in tcg_gen_sub_i64()
1596 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); in tcg_gen_sub_i64()
1605 tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_and_i64()
1615 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_or_i64()
1625 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_xor_i64()
1671 tcg_gen_mulu2_i32(TCGV_LOW(t0), TCGV_HIGH(t0), in tcg_gen_mul_i64()
1672 TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_mul_i64()
1674 tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2)); in tcg_gen_mul_i64()
1676 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2)); in tcg_gen_mul_i64()
1692 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), in tcg_gen_addi_i64()
1693 TCGV_LOW(arg1), TCGV_HIGH(arg1), in tcg_gen_addi_i64()
1705 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), in tcg_gen_subfi_i64()
1707 TCGV_LOW(arg2), TCGV_HIGH(arg2)); in tcg_gen_subfi_i64()
1722 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), in tcg_gen_neg_i64()
1723 zero, zero, TCGV_LOW(arg), TCGV_HIGH(arg)); in tcg_gen_neg_i64()
1730 tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); in tcg_gen_andi_i64()
1766 tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); in tcg_gen_ori_i64()
1783 tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); in tcg_gen_xori_i64()
1804 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); in tcg_gen_shifti_i64()
1810 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); in tcg_gen_shifti_i64()
1813 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); in tcg_gen_shifti_i64()
1817 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); in tcg_gen_shifti_i64()
1818 tcg_gen_movi_i32(TCGV_LOW(ret), 0); in tcg_gen_shifti_i64()
1822 tcg_gen_extract2_i32(TCGV_LOW(ret), in tcg_gen_shifti_i64()
1823 TCGV_LOW(arg1), TCGV_HIGH(arg1), c); in tcg_gen_shifti_i64()
1825 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); in tcg_gen_shifti_i64()
1826 tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(ret), in tcg_gen_shifti_i64()
1837 TCGV_LOW(arg1), TCGV_HIGH(arg1), 32 - c); in tcg_gen_shifti_i64()
1840 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); in tcg_gen_shifti_i64()
1845 tcg_gen_shli_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); in tcg_gen_shifti_i64()
1892 op = tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, TCGV_LOW(arg1), in tcg_gen_brcond_i64()
1893 TCGV_HIGH(arg1), TCGV_LOW(arg2), in tcg_gen_brcond_i64()
1911 TCGV_LOW(arg1), TCGV_HIGH(arg1), in tcg_gen_brcondi_i64()
1928 tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), in tcg_gen_setcond_i64()
1929 TCGV_LOW(arg1), TCGV_HIGH(arg1), in tcg_gen_setcond_i64()
1930 TCGV_LOW(arg2), TCGV_HIGH(arg2), cond); in tcg_gen_setcond_i64()
1948 tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), in tcg_gen_setcondi_i64()
1949 TCGV_LOW(arg1), TCGV_HIGH(arg1), in tcg_gen_setcondi_i64()
1972 tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), in tcg_gen_negsetcond_i64()
1973 TCGV_LOW(arg1), TCGV_HIGH(arg1), in tcg_gen_negsetcond_i64()
1974 TCGV_LOW(arg2), TCGV_HIGH(arg2), cond); in tcg_gen_negsetcond_i64()
1975 tcg_gen_neg_i32(TCGV_LOW(ret), TCGV_LOW(ret)); in tcg_gen_negsetcond_i64()
1976 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_LOW(ret)); in tcg_gen_negsetcond_i64()
2103 tcg_gen_bswap16_i32(TCGV_LOW(ret), TCGV_LOW(arg), flags); in tcg_gen_bswap16_i64()
2105 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_bswap16_i64()
2153 tcg_gen_bswap32_i32(TCGV_LOW(ret), TCGV_LOW(arg)); in tcg_gen_bswap32_i64()
2155 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_bswap32_i64()
2200 tcg_gen_bswap32_i32(t0, TCGV_LOW(arg)); in tcg_gen_bswap64_i64()
2202 tcg_gen_mov_i32(TCGV_LOW(ret), t1); in tcg_gen_bswap64_i64()
2276 tcg_gen_not_i32(TCGV_LOW(ret), TCGV_LOW(arg)); in tcg_gen_not_i64()
2288 tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_andc_i64()
2303 tcg_gen_eqv_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_eqv_i64()
2316 tcg_gen_nand_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_nand_i64()
2329 tcg_gen_nor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_nor_i64()
2342 tcg_gen_orc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_orc_i64()
2369 tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32); in tcg_gen_clzi_i64()
2371 tcg_gen_clz_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), t); in tcg_gen_clzi_i64()
2416 tcg_gen_ctz_i32(TCGV_LOW(ret), TCGV_LOW(arg1), t32); in tcg_gen_ctzi_i64()
2457 tcg_gen_ctpop_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); in tcg_gen_ctpop_i64()
2458 tcg_gen_add_i32(TCGV_LOW(ret), TCGV_LOW(ret), TCGV_HIGH(ret)); in tcg_gen_ctpop_i64()
2561 TCGV_LOW(arg2), ofs - 32, len); in tcg_gen_deposit_i64()
2562 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); in tcg_gen_deposit_i64()
2566 tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(arg1), in tcg_gen_deposit_i64()
2567 TCGV_LOW(arg2), ofs, len); in tcg_gen_deposit_i64()
2620 tcg_gen_deposit_z_i32(TCGV_HIGH(ret), TCGV_LOW(arg), in tcg_gen_deposit_z_i64()
2622 tcg_gen_movi_i32(TCGV_LOW(ret), 0); in tcg_gen_deposit_z_i64()
2626 tcg_gen_deposit_z_i32(TCGV_LOW(ret), TCGV_LOW(arg), ofs, len); in tcg_gen_deposit_z_i64()
2668 tcg_gen_extract_i32(TCGV_LOW(ret), TCGV_HIGH(arg), ofs - 32, len); in tcg_gen_extract_i64()
2673 tcg_gen_extract_i32(TCGV_LOW(ret), TCGV_LOW(arg), ofs, len); in tcg_gen_extract_i64()
2679 tcg_gen_extract2_i32(TCGV_LOW(ret), TCGV_LOW(arg), in tcg_gen_extract_i64()
2682 tcg_gen_extract_i32(TCGV_LOW(ret), TCGV_LOW(ret), 0, len); in tcg_gen_extract_i64()
2739 tcg_gen_sextract_i32(TCGV_LOW(ret), TCGV_HIGH(arg), ofs - 32, len); in tcg_gen_sextract_i64()
2741 tcg_gen_sextract_i32(TCGV_LOW(ret), TCGV_LOW(arg), ofs, len); in tcg_gen_sextract_i64()
2743 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); in tcg_gen_sextract_i64()
2761 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_LOW(ret), 32 - len); in tcg_gen_sextract_i64()
2764 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_sextract_i64()
2827 TCGV_LOW(c1), TCGV_HIGH(c1), in tcg_gen_movcond_i64()
2828 TCGV_LOW(c2), TCGV_HIGH(c2), cond); in tcg_gen_movcond_i64()
2830 tcg_gen_movcond_i32(TCG_COND_NE, TCGV_LOW(ret), t0, zero, in tcg_gen_movcond_i64()
2831 TCGV_LOW(v1), TCGV_LOW(v2)); in tcg_gen_movcond_i64()
2846 tcg_gen_op3_i32(INDEX_op_addco, TCGV_LOW(t0), in tcg_gen_add2_i64()
2847 TCGV_LOW(al), TCGV_LOW(bl)); in tcg_gen_add2_i64()
2850 tcg_gen_op3_i32(INDEX_op_addcio, TCGV_LOW(rh), in tcg_gen_add2_i64()
2851 TCGV_LOW(ah), TCGV_LOW(bh)); in tcg_gen_add2_i64()
2906 tcg_gen_op3_i32(INDEX_op_addco, discard, TCGV_LOW(ci), mone); in tcg_gen_addcio_i64()
2908 tcg_gen_op3_i32(INDEX_op_addcio, TCGV_LOW(r), in tcg_gen_addcio_i64()
2909 TCGV_LOW(a), TCGV_LOW(b)); in tcg_gen_addcio_i64()
2912 tcg_gen_op3_i32(INDEX_op_addci, TCGV_LOW(co), zero, zero); in tcg_gen_addcio_i64()
2919 tcg_gen_or_i32(c1, TCGV_LOW(ci), TCGV_HIGH(ci)); in tcg_gen_addcio_i64()
2922 tcg_gen_add_i32(t0, TCGV_LOW(a), TCGV_LOW(b)); in tcg_gen_addcio_i64()
2923 tcg_gen_setcond_i32(TCG_COND_LTU, c0, t0, TCGV_LOW(a)); in tcg_gen_addcio_i64()
2924 tcg_gen_add_i32(TCGV_LOW(r), t0, c1); in tcg_gen_addcio_i64()
2925 tcg_gen_setcond_i32(TCG_COND_LTU, c1, TCGV_LOW(r), c1); in tcg_gen_addcio_i64()
2932 tcg_gen_or_i32(TCGV_LOW(co), c0, c1); in tcg_gen_addcio_i64()
2949 tcg_gen_op3_i32(INDEX_op_subbo, TCGV_LOW(t0), in tcg_gen_sub2_i64()
2950 TCGV_LOW(al), TCGV_LOW(bl)); in tcg_gen_sub2_i64()
2953 tcg_gen_op3_i32(INDEX_op_subbio, TCGV_LOW(rh), in tcg_gen_sub2_i64()
2954 TCGV_LOW(ah), TCGV_LOW(bh)); in tcg_gen_sub2_i64()
3085 tcg_gen_mov_i32(ret, TCGV_LOW(arg)); in tcg_gen_extrl_i64_i32()
3105 tcg_gen_mov_i32(TCGV_LOW(ret), arg); in tcg_gen_extu_i32_i64()
3116 tcg_gen_mov_i32(TCGV_LOW(ret), arg); in tcg_gen_ext_i32_i64()
3117 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); in tcg_gen_ext_i32_i64()
3129 tcg_gen_mov_i32(TCGV_LOW(dest), low); in tcg_gen_concat_i32_i64()
3153 tcg_gen_mov_i32(lo, TCGV_LOW(arg)); in tcg_gen_extr_i64_i32()