Lines Matching +full:- +full:- +full:extra +full:- +full:cflags
27 #include "tcg/tcg-temp-internal.h"
28 #include "tcg/tcg-op-common.h"
29 #include "exec/translation-block.h"
30 #include "exec/plugin-gen.h"
31 #include "tcg-internal.h"
32 #include "tcg-has.h"
35 * Encourage the compiler to tail-call to a function, rather than inlining.
44 op->args[0] = a1; in tcg_gen_op1()
52 op->args[0] = a1; in tcg_gen_op2()
53 op->args[1] = a2; in tcg_gen_op2()
62 op->args[0] = a1; in tcg_gen_op3()
63 op->args[1] = a2; in tcg_gen_op3()
64 op->args[2] = a3; in tcg_gen_op3()
73 op->args[0] = a1; in tcg_gen_op4()
74 op->args[1] = a2; in tcg_gen_op4()
75 op->args[2] = a3; in tcg_gen_op4()
76 op->args[3] = a4; in tcg_gen_op4()
85 op->args[0] = a1; in tcg_gen_op5()
86 op->args[1] = a2; in tcg_gen_op5()
87 op->args[2] = a3; in tcg_gen_op5()
88 op->args[3] = a4; in tcg_gen_op5()
89 op->args[4] = a5; in tcg_gen_op5()
98 op->args[0] = a1; in tcg_gen_op6()
99 op->args[1] = a2; in tcg_gen_op6()
100 op->args[2] = a3; in tcg_gen_op6()
101 op->args[3] = a4; in tcg_gen_op6()
102 op->args[4] = a5; in tcg_gen_op6()
103 op->args[5] = a6; in tcg_gen_op6()
108 * With CONFIG_DEBUG_TCG, tcgv_*_tmp via tcgv_*_arg, is an out-of-line
280 l->present = 1; in gen_set_label()
288 u->op = op; in add_as_label_use()
289 QSIMPLEQ_INSERT_TAIL(&l->branches, u, next); in add_as_label_use()
300 bool parallel = tcg_ctx->gen_tb->cflags & CF_PARALLEL; in tcg_gen_mb()
376 tcg_gen_addi_i32(ret, arg1, -arg2); in tcg_gen_subi_i32()
396 case -1: in tcg_gen_andi_i32()
427 if (arg2 == -1) { in tcg_gen_ori_i32()
428 tcg_gen_movi_i32(ret, -1); in tcg_gen_ori_i32()
446 } else if (arg2 == -1 && in tcg_gen_xori_i32()
460 tcg_gen_xori_i32(ret, arg, -1); in tcg_gen_not_i32()
551 tcg_gen_movi_i32(ret, -1); in tcg_gen_negsetcond_i32()
844 TCGv_i32 t0 = tcg_constant_i32(32 - arg2); in tcg_gen_rotli_i32()
850 tcg_gen_shri_i32(t1, arg1, 32 - arg2); in tcg_gen_rotli_i32()
881 tcg_gen_rotli_i32(ret, arg1, -arg2 & 31); in tcg_gen_rotri_i32()
919 mask = (1u << len) - 1; in tcg_gen_deposit_i32()
943 tcg_gen_andi_i32(ret, arg, (1u << len) - 1); in tcg_gen_deposit_z_i32()
949 * To help two-operand hosts we prefer to zero-extend first, in tcg_gen_deposit_z_i32()
957 /* Otherwise prefer zero-extension over AND for code size. */ in tcg_gen_deposit_z_i32()
963 tcg_gen_andi_i32(ret, arg, (1u << len) - 1); in tcg_gen_deposit_z_i32()
978 tcg_gen_shri_i32(ret, arg, 32 - len); in tcg_gen_extract_i32()
987 tcg_gen_andi_i32(ret, arg, (1u << len) - 1); in tcg_gen_extract_i32()
991 /* Assume that zero-extension, if available, is cheaper than a shift. */ in tcg_gen_extract_i32()
1004 tcg_gen_andi_i32(ret, ret, (1u << len) - 1); in tcg_gen_extract_i32()
1007 tcg_gen_shli_i32(ret, arg, 32 - len - ofs); in tcg_gen_extract_i32()
1008 tcg_gen_shri_i32(ret, ret, 32 - len); in tcg_gen_extract_i32()
1023 tcg_gen_sari_i32(ret, arg, 32 - len); in tcg_gen_sextract_i32()
1032 /* Assume that sign-extension, if available, is cheaper than a shift. */ in tcg_gen_sextract_i32()
1044 tcg_gen_shli_i32(ret, arg, 32 - len - ofs); in tcg_gen_sextract_i32()
1045 tcg_gen_sari_i32(ret, ret, 32 - len); in tcg_gen_sextract_i32()
1049 * Extract 32-bits from a 64-bit input, ah:al, starting from ofs.
1067 tcg_gen_deposit_i32(ret, t0, ah, 32 - ofs, ofs); in tcg_gen_extract2_i32()
1112 TCGv_i32 mone = tcg_constant_i32(-1); in tcg_gen_addcio_i32()
1267 * bswap16_i32: 16-bit byte swap on the low bits of a 32-bit value.
1269 * Byte pattern: xxab -> yyba
1310 * bswap32_i32: 32-bit byte swap on a 32-bit value.
1312 * Byte pattern: abcd -> dcba
1340 * hswap_i32: Swap 16-bit halfwords within a 32-bit value.
1342 * Byte pattern: abcd -> cdab
1346 /* Swapping 2 16-bit elements is a rotate. */ in tcg_gen_hswap_i32()
1421 /* 64-bit ops */
1444 if (ts->kind == TEMP_CONST) { in tcg_gen_mov_i64()
1445 tcg_gen_movi_i64(ret, ts->val); in tcg_gen_mov_i64()
1526 * For 32-bit host, since arg2 and ret have different types, in tcg_gen_ld_i64()
1527 * they cannot be the same temporary -- no chance of overlap. in tcg_gen_ld_i64()
1713 tcg_gen_addi_i64(ret, arg1, -arg2); in tcg_gen_subi_i64()
1740 case -1: in tcg_gen_andi_i64()
1771 if (arg2 == -1) { in tcg_gen_ori_i64()
1772 tcg_gen_movi_i64(ret, -1); in tcg_gen_ori_i64()
1790 } else if (arg2 == -1 && in tcg_gen_xori_i64()
1807 c -= 32; in tcg_gen_shifti_i64()
1827 TCGV_HIGH(arg1), 32 - c, c); in tcg_gen_shifti_i64()
1837 TCGV_LOW(arg1), TCGV_HIGH(arg1), 32 - c); in tcg_gen_shifti_i64()
1840 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); in tcg_gen_shifti_i64()
1842 TCGV_HIGH(arg1), c, 32 - c); in tcg_gen_shifti_i64()
1966 tcg_gen_movi_i64(ret, -1); in tcg_gen_negsetcond_i64()
2090 * bswap16_i64: 16-bit byte swap on the low bits of a 64-bit value.
2092 * Byte pattern: xxxxxxxxab -> yyyyyyyyba
2140 * bswap32_i64: 32-bit byte swap on the low bits of a 64-bit value.
2142 * Byte pattern: xxxxabcd -> yyyydcba
2189 * bswap64_i64: 64-bit byte swap on a 64-bit value.
2191 * Byte pattern: abcdefgh -> hgfedcba
2239 * hswap_i64: Swap 16-bit halfwords within a 64-bit value.
2242 * Byte pattern: abcdefgh -> ghefcdab
2263 * wswap_i64: Swap 32-bit words within a 64-bit value.
2265 * Byte pattern: abcdefgh -> efghabcd
2269 /* Swapping 2 32-bit elements is a rotate. */ in tcg_gen_wswap_i64()
2281 tcg_gen_xori_i64(ret, arg, -1); in tcg_gen_not_i64()
2369 tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32); in tcg_gen_clzi_i64()
2414 tcg_gen_ctzi_i32(t32, TCGV_HIGH(arg1), arg2 - 32); in tcg_gen_ctzi_i64()
2497 TCGv_i64 t0 = tcg_constant_i64(64 - arg2); in tcg_gen_rotli_i64()
2503 tcg_gen_shri_i64(t1, arg1, 64 - arg2); in tcg_gen_rotli_i64()
2534 tcg_gen_rotli_i64(ret, arg1, -arg2 & 63); in tcg_gen_rotri_i64()
2561 TCGV_LOW(arg2), ofs - 32, len); in tcg_gen_deposit_i64()
2588 mask = (1ull << len) - 1; in tcg_gen_deposit_i64()
2612 tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); in tcg_gen_deposit_z_i64()
2621 ofs - 32, len); in tcg_gen_deposit_z_i64()
2632 * To help two-operand hosts we prefer to zero-extend first, in tcg_gen_deposit_z_i64()
2640 /* Otherwise prefer zero-extension over AND for code size. */ in tcg_gen_deposit_z_i64()
2646 tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); in tcg_gen_deposit_z_i64()
2661 tcg_gen_shri_i64(ret, arg, 64 - len); in tcg_gen_extract_i64()
2666 /* Look for a 32-bit extract within one of the two words. */ in tcg_gen_extract_i64()
2668 tcg_gen_extract_i32(TCGV_LOW(ret), TCGV_HIGH(arg), ofs - 32, len); in tcg_gen_extract_i64()
2686 ofs, len - 32); in tcg_gen_extract_i64()
2696 tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); in tcg_gen_extract_i64()
2700 /* Assume that zero-extension, if available, is cheaper than a shift. */ in tcg_gen_extract_i64()
2713 tcg_gen_andi_i64(ret, ret, (1ull << len) - 1); in tcg_gen_extract_i64()
2716 tcg_gen_shli_i64(ret, arg, 64 - len - ofs); in tcg_gen_extract_i64()
2717 tcg_gen_shri_i64(ret, ret, 64 - len); in tcg_gen_extract_i64()
2732 tcg_gen_sari_i64(ret, arg, 64 - len); in tcg_gen_sextract_i64()
2737 /* Look for a 32-bit extract within one of the two words. */ in tcg_gen_sextract_i64()
2739 tcg_gen_sextract_i32(TCGV_LOW(ret), TCGV_HIGH(arg), ofs - 32, len); in tcg_gen_sextract_i64()
2744 tcg_gen_sextract_i32(TCGV_HIGH(ret), TCGV_HIGH(arg), 0, len - 32); in tcg_gen_sextract_i64()
2749 tcg_gen_sextract_i32(t, TCGV_HIGH(arg), ofs + 32, len - 32); in tcg_gen_sextract_i64()
2759 tcg_gen_shri_i64(ret, arg, ofs + len - 32); in tcg_gen_sextract_i64()
2761 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_LOW(ret), 32 - len); in tcg_gen_sextract_i64()
2763 /* Sign-extend the field from 32 bits. */ in tcg_gen_sextract_i64()
2773 /* Assume that sign-extension, if available, is cheaper than a shift. */ in tcg_gen_sextract_i64()
2785 tcg_gen_shli_i64(ret, arg, 64 - len - ofs); in tcg_gen_sextract_i64()
2786 tcg_gen_sari_i64(ret, ret, 64 - len); in tcg_gen_sextract_i64()
2790 * Extract 64 bits from a 128-bit input, ah:al, starting from ofs.
2808 tcg_gen_deposit_i64(ret, t0, ah, 64 - ofs, ofs); in tcg_gen_extract2_i64()
2881 TCGv_i64 mone = tcg_constant_i64(-1); in tcg_gen_addcio_i64()
2904 TCGv_i32 mone = tcg_constant_i32(-1); in tcg_gen_addcio_i64()
3139 /* If deposit is available, use it. Otherwise use the extra in tcg_gen_concat_i32_i64()
3140 knowledge that we have of the zero-extensions above. */ in tcg_gen_concat_i32_i64()
3219 * Let the jit code return the read-only version of the in tcg_gen_exit_tb()
3220 * TranslationBlock, so that we minimize the pc-relative in tcg_gen_exit_tb()
3222 * This will improve utilization of pc-relative address loads. in tcg_gen_exit_tb()
3225 * TranslationBlock pointers refer to read-only memory. in tcg_gen_exit_tb()
3237 tcg_debug_assert(tcg_ctx->goto_tb_issue_mask & (1 << idx)); in tcg_gen_exit_tb()
3250 tcg_debug_assert(!(tcg_ctx->gen_tb->cflags & CF_NO_GOTO_TB)); in tcg_gen_goto_tb()
3255 tcg_debug_assert((tcg_ctx->goto_tb_issue_mask & (1 << idx)) == 0); in tcg_gen_goto_tb()
3256 tcg_ctx->goto_tb_issue_mask |= 1 << idx; in tcg_gen_goto_tb()
3266 if (tcg_ctx->gen_tb->cflags & CF_NO_GOTO_PTR) { in tcg_gen_lookup_and_goto_ptr()