xtensa/core-dsp3400/core-matmap.h

2  * xtensa/config/core-matmap.h -- Memory access and translation mapping
10  *  information contained in the core-isa.h header file.
19  *	XCHAL_ICACHE_SIZE		(presence of I-cache)
20  *	XCHAL_DCACHE_SIZE		(presence of D-cache)
25 /* Copyright (c) 1999-2010 Tensilica Inc.
49 /*----------------------------------------------------------------------
51   ----------------------------------------------------------------------*/
54 /*  Cache Attribute encodings -- lists of access modes for each cache attribute:  */
106  *  Specific encoded cache attribute values of general interest.
112 #define XCHAL_CA_WRITETHRU		1	/* cache enabled (write-through) mode */
113 #define XCHAL_CA_WRITEBACK		4	/* cache enabled (write-back) mode */
114 #define XCHAL_CA_WRITEBACK_NOALLOC	4	/* cache enabled (write-back no-allocate) mode */
119 /*----------------------------------------------------------------------
121   ----------------------------------------------------------------------*/
127  *	ASID = address-space ID (acts as an "extension" of virtual addresses)
130  *	CA   = encoded cache attribute (access modes)
131  *	TLB  = translation look-aside buffer (term is stretched somewhat here)
141  *	set  = group of contiguous ways with exactly identical parameters
142  *	ARF  = auto-refill; hardware services a 1st-level miss by loading a PTE
143  *		from the page table and storing it in one of the auto-refill ways;
145  *	min-wired = a "min-wired" way can be used to map a single (minimum-sized)
147  *		is non-auto-refill (some other way(s) must be auto-refill),
154  *	- must have all writable VPN and PPN fields;
155  *	- can only use one page size at any given time (eg. setup at startup),
158  *	  (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n);
159  *	  this list may be sparse for auto-refill ways because auto-refill
164  *	- is only possible for ways 0 thru 7 (due to ITLBCFG/DTLBCFG definition).
169 #define XCHAL_MMU_SR_BITS		0	/* number of size-restriction bits supported */
170 #define XCHAL_MMU_CA_BITS		4	/* number of bits needed to hold cache attribute encoding */
178 #define XCHAL_ITLB_WAYS			1	/* number of ways (n-way set-associative TLB) */
179 #define XCHAL_ITLB_ARF_WAYS		0	/* number of auto-refill ways */
182 /*  Way set to which each way belongs:  */
185 /*  Ways sets that are used by hardware auto-refill (ARF):  */
186 #define XCHAL_ITLB_ARF_SETS		0	/* number of auto-refill sets */
188 /*  Way sets that are "min-wired" (see terminology comment above):  */
189 #define XCHAL_ITLB_MINWIRED_SETS	0	/* number of "min-wired" sets */
192 /*  ITLB way set 0 (group of ways 0 thru 0):  */
193 #define XCHAL_ITLB_SET0_WAY			0	/* index of first way in this way set */
194 #define XCHAL_ITLB_SET0_WAYS			1	/* number of (contiguous) ways in this way set */
197 #define XCHAL_ITLB_SET0_ARF			0	/* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
212 /*  Constant VPN values for each entry of ITLB way set 0 (because VPN_CONSTMASK is non-zero):  */
221 /*  Reset PPN values for each entry of ITLB way set 0 (because SET0_PPN_RESET is non-zero):  */
230 /*  Reset CA values for each entry of ITLB way set 0 (because SET0_CA_RESET is non-zero):  */
244 #define XCHAL_DTLB_WAYS			1	/* number of ways (n-way set-associative TLB) */
245 #define XCHAL_DTLB_ARF_WAYS		0	/* number of auto-refill ways */
248 /*  Way set to which each way belongs:  */
251 /*  Ways sets that are used by hardware auto-refill (ARF):  */
252 #define XCHAL_DTLB_ARF_SETS		0	/* number of auto-refill sets */
254 /*  Way sets that are "min-wired" (see terminology comment above):  */
255 #define XCHAL_DTLB_MINWIRED_SETS	0	/* number of "min-wired" sets */
258 /*  DTLB way set 0 (group of ways 0 thru 0):  */
259 #define XCHAL_DTLB_SET0_WAY			0	/* index of first way in this way set */
260 #define XCHAL_DTLB_SET0_WAYS			1	/* number of (contiguous) ways in this way set */
263 #define XCHAL_DTLB_SET0_ARF			0	/* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
278 /*  Constant VPN values for each entry of DTLB way set 0 (because VPN_CONSTMASK is non-zero):  */
287 /*  Reset PPN values for each entry of DTLB way set 0 (because SET0_PPN_RESET is non-zero):  */
296 /*  Reset CA values for each entry of DTLB way set 0 (because SET0_CA_RESET is non-zero):  */