539     if (env->dmmu.sfsr & SFSR_VALID_BIT) { /* Fault status register */  in build_sfsr()
566         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_data()
572         context = env->dmmu.mmu_secondary_context & 0x1fff;  in get_physical_address_data()
629             env->dmmu.sfsr = sfsr;  in get_physical_address_data()
630             env->dmmu.sfar = address; /* Fault address register */  in get_physical_address_data()
631             env->dmmu.tag_access = (address & ~0x1fffULL) | context;  in get_physical_address_data()
643     env->dmmu.tag_access = (address & ~0x1fffULL) | context;  in get_physical_address_data()
665         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_code()
674         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_code()
736                                                 env->dmmu.mmu_primary_context,  in get_physical_address()
737                                                 env->dmmu.mmu_secondary_context,  in get_physical_address()
741                                                 env->dmmu.mmu_primary_context,  in get_physical_address()
742                                                 env->dmmu.mmu_secondary_context,  in get_physical_address()
774                                    env->dmmu.mmu_primary_context,  in sparc_cpu_tlb_fill()
775                                    env->dmmu.mmu_secondary_context);  in sparc_cpu_tlb_fill()
792                 env->dmmu.mmu_primary_context,  in dump_mmu()
793                 env->dmmu.mmu_secondary_context);  in dump_mmu()
795                 "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target);  in dump_mmu()
923     env->dmmu.sfsr = build_sfsr(env, mmu_idx, access_type);  in sparc_cpu_do_unaligned_access()
924     env->dmmu.sfar = addr;  in sparc_cpu_do_unaligned_access()