Lines Matching full:cache
31 /* VAC Cache flushing on sun4c and sun4 */
51 #define ASI_M_TXTC_TAG 0x0C /* Instruction Cache Tag; rw, ss */
52 #define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */
53 #define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */
54 #define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */
56 /* The following cache flushing ASIs work only with the 'sta'
62 #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */
63 #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */
64 #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */
65 #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */
66 #define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */
72 #define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */
73 #define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */
74 #define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */
75 #define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */
76 #define ASI_M_IFLUSH_USER 0x1C /* Flush I Cache Line (user); wo, ss */
99 /* Tsunami/Viking/TurboSparc i/d cache flash clear. */
103 #define ASI_M_DCDR 0x39 /* Data Cache Diagnostics Register rw, ss */
212 #define ASI_ESTATE_ERROR_EN 0x4b /* E-cache error enable space */
215 #define ASI_EC_TAG_DATA 0x4e /* E-cache tag/valid ram diag acc */
236 #define ASI_IC_INSTR 0x66 /* Insn cache instruction ram diag */
237 #define ASI_IC_TAG 0x67 /* Insn cache tag/valid ram diag */
238 #define ASI_IC_STAG 0x68 /* (III) Insn cache snoop tag ram */
239 #define ASI_IC_PRE_DECODE 0x6e /* Insn cache pre-decode ram diag */
240 #define ASI_IC_NEXT_FIELD 0x6f /* Insn cache next-field ram diag */
245 #define ASI_EC_DATA 0x74 /* (III) E-cache data staging reg */
246 #define ASI_EC_CTRL 0x75 /* (III) E-cache control reg */
247 #define ASI_EC_W 0x76 /* E-cache diag write access */
255 #define ASI_EC_R 0x7e /* E-cache diag read access */