505             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,  in _decode_opc()
529             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,  in _decode_opc()
537             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,  in _decode_opc()
573         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);  in _decode_opc()
576         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
580         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
611         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);  in _decode_opc()
616         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
622         tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
654             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_SB);  in _decode_opc()
661             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,  in _decode_opc()
669             tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,  in _decode_opc()
804             tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx,  in _decode_opc()
807             tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx,  in _decode_opc()
818             tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx,  in _decode_opc()
821             tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx,  in _decode_opc()
987             tcg_gen_qemu_ld_i32(FREG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
1000             tcg_gen_qemu_ld_i32(FREG(B11_8), REG(B7_4), ctx->memidx,  in _decode_opc()
1034                 tcg_gen_qemu_ld_i32(FREG(B11_8), addr, ctx->memidx,  in _decode_opc()
1142             tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB);  in _decode_opc()
1174             tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_SB);  in _decode_opc()
1181             tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_TESW | MO_ALIGN);  in _decode_opc()
1188             tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_TESL | MO_ALIGN);  in _decode_opc()
1231             tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_SB);  in _decode_opc()
1238             tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx,  in _decode_opc()
1256             tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB);  in _decode_opc()
1282             tcg_gen_qemu_ld_i32(val, val, ctx->memidx, MO_UB);  in _decode_opc()
1296             tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB);  in _decode_opc()
1310         tcg_gen_qemu_ld_i32(ALTREG(B6_4), REG(B11_8), ctx->memidx,  in _decode_opc()
1380             tcg_gen_qemu_ld_i32(val, REG(B11_8), ctx->memidx,  in _decode_opc()
1410     tcg_gen_qemu_ld_i32(cpu_##reg, REG(B11_8), ctx->memidx,          \  in _decode_opc()
1452             tcg_gen_qemu_ld_i32(addr, REG(B11_8), ctx->memidx,  in _decode_opc()
1478             tcg_gen_qemu_ld_i32(val, REG(B11_8), ctx->memidx,  in _decode_opc()
1489         tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx,  in _decode_opc()
1495         tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx,  in _decode_opc()
1555             tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx,  in _decode_opc()
1560             tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx,  in _decode_opc()