Lines Matching refs:mmucr
210 env->mmucr &= (and_mask << 24) | 0x00ffffff; in update_itlb_use()
211 env->mmucr |= (or_mask << 24); in update_itlb_use()
216 if ((env->mmucr & 0xe0000000) == 0xe0000000) { in itlb_replacement()
219 if ((env->mmucr & 0x98000000) == 0x18000000) { in itlb_replacement()
222 if ((env->mmucr & 0x54000000) == 0x04000000) { in itlb_replacement()
225 if ((env->mmucr & 0x2c000000) == 0x00000000) { in itlb_replacement()
265 urb = ((env->mmucr) >> 18) & 0x3f; in increment_urc()
266 urc = ((env->mmucr) >> 10) & 0x3f; in increment_urc()
270 env->mmucr = (env->mmucr & 0xffff03ff) | (urc << 10); in increment_urc()
335 use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in get_mmu_address()
424 if (!(env->mmucr & MMUCR_AT)) { in get_physical_address()
450 int n = cpu_mmucr_urc(env->mmucr); in cpu_load_tlb()
611 int use_asid = !(s->mmucr & MMUCR_SV) || !(s->sr & (1u << SR_MD)); in cpu_sh4_write_mmaped_utlb_addr()
741 int use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in cpu_sh4_is_cached()
767 if (env->mmucr & MMUCR_AT) in cpu_sh4_is_cached()