682     if (a->rs == 0 || a->rs >= a->rs2) {  in trans_PUSHM()
684                       "Invalid  register ranges r%d-r%d", a->rs, a->rs2);  in trans_PUSHM()
686     r = a->rs2;  in trans_PUSHM()
856     rx_gen_op_rrr(rx_and, a->rd, a->rs, a->rs2);  in trans_AND_rrr()
886     rx_gen_op_rrr(rx_or, a->rd, a->rs, a->rs2);  in trans_OR_rrr()
1020     rx_gen_op_irr(rx_add, a->rd, a->rs2, a->imm);  in trans_ADD_irr()
1035     rx_gen_op_rrr(rx_add, a->rd, a->rs, a->rs2);  in trans_ADD_rrr()
1074     rx_gen_op_irr(rx_cmp, 0, a->rs2, a->imm);  in trans_CMP_ir()
1104     rx_gen_op_rrr(rx_sub, a->rd, a->rs2, a->rs);  in trans_SUB_rrr()
1183     rx_gen_op_rrr(tcg_gen_mul_i32, a->rd, a->rs, a->rs2);  in trans_MUL_rrr()
1289         tcg_gen_sari_i32(cpu_psw_c, cpu_regs[a->rs2], 32 - a->imm);  in trans_SHLL_irr()
1290         tcg_gen_shli_i32(cpu_regs[a->rd], cpu_regs[a->rs2], a->imm);  in trans_SHLL_irr()
1296         tcg_gen_mov_i32(cpu_regs[a->rd], cpu_regs[a->rs2]);  in trans_SHLL_irr()
1393     shiftr_imm(a->rd, a->rs2, a->imm, 1);  in trans_SHAR_irr()
1408     shiftr_imm(a->rd, a->rs2, a->imm, 0);  in trans_SHLR_irr()
1701 static void rx_mul64hi(TCGv_i64 ret, int rs, int rs2)  in rx_mul64hi()  argument
1708     tcg_gen_ext_i32_i64(tmp1, cpu_regs[rs2]);  in rx_mul64hi()
1714 static void rx_mul64lo(TCGv_i64 ret, int rs, int rs2)  in rx_mul64lo()  argument
1721     tcg_gen_ext_i32_i64(tmp1, cpu_regs[rs2]);  in rx_mul64lo()
1730     rx_mul64hi(cpu_acc, a->rs, a->rs2);  in trans_MULHI()
1737     rx_mul64lo(cpu_acc, a->rs, a->rs2);  in trans_MULLO()
1746     rx_mul64hi(tmp, a->rs, a->rs2);  in trans_MACHI()
1756     rx_mul64lo(tmp, a->rs, a->rs2);  in trans_MACLO()