target/rx/cpu.h

24 #include "cpu-qom.h"
26 #include "exec/cpu-common.h"
27 #include "exec/cpu-defs.h"
28 #include "exec/cpu-interrupt.h"
29 #include "qemu/cpu-float.h"
88     uint32_t isp;               /* global base register */
96     /* Fields up to this point are cleared by a CPU reset */
124  * @parent_phases: The parent class' reset phase handlers.
159     psw = FIELD_DP32(psw, PSW, IPL, env->psw_ipl);  in rx_cpu_pack_psw()
160     psw = FIELD_DP32(psw, PSW, PM,  env->psw_pm);  in rx_cpu_pack_psw()
161     psw = FIELD_DP32(psw, PSW, U,   env->psw_u);  in rx_cpu_pack_psw()
162     psw = FIELD_DP32(psw, PSW, I,   env->psw_i);  in rx_cpu_pack_psw()
163     psw = FIELD_DP32(psw, PSW, O,   env->psw_o >> 31);  in rx_cpu_pack_psw()
164     psw = FIELD_DP32(psw, PSW, S,   env->psw_s >> 31);  in rx_cpu_pack_psw()
165     psw = FIELD_DP32(psw, PSW, Z,   env->psw_z == 0);  in rx_cpu_pack_psw()
166     psw = FIELD_DP32(psw, PSW, C,   env->psw_c);  in rx_cpu_pack_psw()