20 #include "qemu/qemu-print.h"
25 #include "exec/page-protection.h"
26 #include "exec/translation-block.h"
30 #include "tcg/debug-assert.h"
31 #include "accel/tcg/cpu-ops.h"
37     cpu->env.pc = value;  in rx_cpu_set_pc()
44     return cpu->env.pc;  in rx_cpu_get_pc()
50     uint32_t flags = 0;  in rx_get_tb_cpu_state()  local
52     flags = FIELD_DP32(flags, PSW, PM, env->psw_pm);  in rx_get_tb_cpu_state()
53     flags = FIELD_DP32(flags, PSW, U, env->psw_u);  in rx_get_tb_cpu_state()
55     return (TCGTBCPUState){ .pc = env->pc, .flags = flags };  in rx_get_tb_cpu_state()
64     cpu->env.pc = tb->pc;  in rx_cpu_synchronize_from_tb()
73     cpu->env.pc = data[0];  in rx_restore_state_to_opc()
78     return cs->interrupt_request &  in rx_cpu_has_work()
94     if (rcc->parent_phases.hold) {  in rx_cpu_reset_hold()
95         rcc->parent_phases.hold(obj, type);  in rx_cpu_reset_hold()
103         env->pc = ldl_p(resetvec);  in rx_cpu_reset_hold()
106     env->regs[0] = env->isp = env->usp = 0;  in rx_cpu_reset_hold()
107     env->fpsw = 0;  in rx_cpu_reset_hold()
108     set_flush_to_zero(1, &env->fp_status);  in rx_cpu_reset_hold()
109     set_flush_inputs_to_zero(1, &env->fp_status);  in rx_cpu_reset_hold()
116     set_float_2nan_prop_rule(float_2nan_prop_x87, &env->fp_status);  in rx_cpu_reset_hold()
118     set_float_default_nan_pattern(0b01000000, &env->fp_status);  in rx_cpu_reset_hold()
121      * on whether flush-to-zero should happen before or after rounding, but  in rx_cpu_reset_hold()
126     set_float_ftz_detection(float_ftz_before_rounding, &env->fp_status);  in rx_cpu_reset_hold()
160     rcc->parent_realize(dev, errp);  in rx_cpu_realize()
169     static const int mask[] = {  in rx_cpu_set_irq()  local
174         cpu->env.req_irq = irq;  in rx_cpu_set_irq()
175         cpu->env.req_ipl = (request >> 8) & 0x0f;  in rx_cpu_set_irq()
176         cpu_interrupt(cs, mask[no]);  in rx_cpu_set_irq()
178         cpu_reset_interrupt(cs, mask[no]);  in rx_cpu_set_irq()
184     info->endian = BFD_ENDIAN_LITTLE;  in rx_cpu_disas_set_info()
185     info->mach = bfd_mach_rx;  in rx_cpu_disas_set_info()
186     info->print_insn = print_insn_rx;  in rx_cpu_disas_set_info()
209 #include "hw/core/sysemu-cpu-ops.h"
244                                     &rcc->parent_realize);  in rx_cpu_class_init()
246                                        &rcc->parent_phases);  in rx_cpu_class_init()
248     cc->class_by_name = rx_cpu_class_by_name;  in rx_cpu_class_init()
249     cc->dump_state = rx_cpu_dump_state;  in rx_cpu_class_init()
250     cc->set_pc = rx_cpu_set_pc;  in rx_cpu_class_init()
251     cc->get_pc = rx_cpu_get_pc;  in rx_cpu_class_init()
253     cc->sysemu_ops = &rx_sysemu_ops;  in rx_cpu_class_init()
254     cc->gdb_read_register = rx_cpu_gdb_read_register;  in rx_cpu_class_init()
255     cc->gdb_write_register = rx_cpu_gdb_write_register;  in rx_cpu_class_init()
256     cc->disas_set_info = rx_cpu_disas_set_info;  in rx_cpu_class_init()
258     cc->gdb_core_xml_file = "rx-core.xml";  in rx_cpu_class_init()
259     cc->tcg_ops = &rx_tcg_ops;  in rx_cpu_class_init()