Lines Matching full:if

17  * this program.  If not, see <http://www.gnu.org/licenses/>.
78 if (enabled) { in riscv_cpu_write_misa_bit()
109 if (cpu->cfg.ext_zve32x) { in riscv_get_tb_cpu_state()
111 * If env->vl equals to VLMAX, we can use generic vector operation in riscv_get_tb_cpu_state()
140 if (cpu_get_fcfien(env)) { in riscv_get_tb_cpu_state()
150 if (cpu_get_bcfien(env)) { in riscv_get_tb_cpu_state()
164 if (env->virt_enabled) { in riscv_get_tb_cpu_state()
175 if (!riscv_has_ext(env, RVF)) { in riscv_get_tb_cpu_state()
180 if (cpu->cfg.debug && !icount_enabled()) { in riscv_get_tb_cpu_state()
201 if (!(tb_cflags(tb) & CF_PCREL)) { in riscv_cpu_synchronize_from_tb()
208 if (xl == MXL_RV32) { in riscv_cpu_synchronize_from_tb()
225 if (tb_cflags(tb) & CF_PCREL) { in riscv_restore_state_to_opc()
231 if (xl == MXL_RV32) { in riscv_restore_state_to_opc()
248 if (cpu_address_xl(env) == MXL_RV32) { in riscv_pointer_wrap()
253 if (pm_len == 0) { in riscv_pointer_wrap()
258 if (pm_signext) { in riscv_pointer_wrap()
296 if (edata->ext_enable_offset != ext_offset) { in cpu_cfg_ext_get_min_version()
312 if (edata->ext_enable_offset == ext_offset) { in cpu_cfg_ext_get_name()
318 if (feat->offset == ext_offset) { in cpu_cfg_ext_get_name()
331 if (feat->offset == ext_offset) { in cpu_cfg_offset_is_named_feat()
352 if (!cpu_misa_ext_is_user_set(RVH)) { in riscv_cpu_enable_named_feat()
367 if (env->priv_ver == PRIV_VERSION_LATEST) { in cpu_bump_multi_ext_priv_ver()
373 if (env->priv_ver < ext_priv_ver) { in cpu_bump_multi_ext_priv_ver()
375 * Note: the 'priv_spec' command line option, if present, in cpu_bump_multi_ext_priv_ver()
389 if (prev_val == value) { in cpu_cfg_ext_auto_update()
393 if (cpu_cfg_ext_is_user_set(ext_offset)) { in cpu_cfg_ext_auto_update()
397 if (value && env->priv_ver != PRIV_VERSION_LATEST) { in cpu_cfg_ext_auto_update()
398 /* Do not enable it if priv_ver is older than min_version */ in cpu_cfg_ext_auto_update()
400 if (env->priv_ver < min_version) { in cpu_cfg_ext_auto_update()
410 if (riscv_has_ext(env, RVH) && env->priv_ver < PRIV_VERSION_1_12_0) { in riscv_cpu_validate_misa_priv()
421 if (vlen > RV_VLEN_MAX || vlen < 128) { in riscv_cpu_validate_v()
428 if (cfg->elen > 64 || cfg->elen < 8) { in riscv_cpu_validate_v()
441 /* Force disable extensions if priv spec version does not match */ in riscv_cpu_disable_priv_spec_isa_exts()
443 if (isa_ext_is_enabled(cpu, edata->ext_enable_offset) && in riscv_cpu_disable_priv_spec_isa_exts()
449 if (!strcmp(edata->name, "zicntr") || in riscv_cpu_disable_priv_spec_isa_exts()
459 if (!strcmp(edata->name, "sdtrig")) { in riscv_cpu_disable_priv_spec_isa_exts()
470 if (cpu_cfg_offset_is_named_feat(edata->ext_enable_offset)) { in riscv_cpu_disable_priv_spec_isa_exts()
488 if (cpu->env.priv_ver >= PRIV_VERSION_1_11_0) { in riscv_cpu_update_named_features()
492 if (cpu->env.priv_ver >= PRIV_VERSION_1_12_0) { in riscv_cpu_update_named_features()
496 if (cpu->env.priv_ver >= PRIV_VERSION_1_13_0) { in riscv_cpu_update_named_features()
521 if (riscv_has_ext(&cpu->env, bit)) { in riscv_cpu_validate_g()
525 if (!cpu_misa_ext_is_user_set(bit)) { in riscv_cpu_validate_g()
530 if (send_warn) { in riscv_cpu_validate_g()
535 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_g()
536 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr))) { in riscv_cpu_validate_g()
538 } else if (send_warn) { in riscv_cpu_validate_g()
543 if (!cpu->cfg.ext_zifencei) { in riscv_cpu_validate_g()
544 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zifencei))) { in riscv_cpu_validate_g()
546 } else if (send_warn) { in riscv_cpu_validate_g()
556 if (!cpu->cfg.ext_zba) { in riscv_cpu_validate_b()
557 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zba))) { in riscv_cpu_validate_b()
564 if (!cpu->cfg.ext_zbb) { in riscv_cpu_validate_b()
565 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbb))) { in riscv_cpu_validate_b()
572 if (!cpu->cfg.ext_zbs) { in riscv_cpu_validate_b()
573 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbs))) { in riscv_cpu_validate_b()
591 if (riscv_has_ext(env, RVG)) { in riscv_cpu_validate_set_extensions()
595 if (riscv_has_ext(env, RVB)) { in riscv_cpu_validate_set_extensions()
599 if (riscv_has_ext(env, RVI) && riscv_has_ext(env, RVE)) { in riscv_cpu_validate_set_extensions()
605 if (!riscv_has_ext(env, RVI) && !riscv_has_ext(env, RVE)) { in riscv_cpu_validate_set_extensions()
611 if (riscv_has_ext(env, RVS) && !riscv_has_ext(env, RVU)) { in riscv_cpu_validate_set_extensions()
617 if (riscv_has_ext(env, RVH) && !riscv_has_ext(env, RVI)) { in riscv_cpu_validate_set_extensions()
623 if (riscv_has_ext(env, RVH) && !riscv_has_ext(env, RVS)) { in riscv_cpu_validate_set_extensions()
628 if (riscv_has_ext(env, RVF) && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
633 if ((cpu->cfg.ext_zacas) && !riscv_has_ext(env, RVA)) { in riscv_cpu_validate_set_extensions()
638 if ((cpu->cfg.ext_zawrs) && !riscv_has_ext(env, RVA)) { in riscv_cpu_validate_set_extensions()
643 if (cpu->cfg.ext_zfa && !riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
648 if (cpu->cfg.ext_zfhmin && !riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
653 if (cpu->cfg.ext_zfbfmin && !riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
658 if (riscv_has_ext(env, RVD) && !riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
663 if (riscv_has_ext(env, RVV)) { in riscv_cpu_validate_set_extensions()
665 if (local_err != NULL) { in riscv_cpu_validate_set_extensions()
672 if (cpu->cfg.ext_zve64d) { in riscv_cpu_validate_set_extensions()
673 if (!riscv_has_ext(env, RVD)) { in riscv_cpu_validate_set_extensions()
680 if (cpu->cfg.ext_zve32f) { in riscv_cpu_validate_set_extensions()
681 if (!riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
687 if (cpu->cfg.ext_zvfhmin && !cpu->cfg.ext_zve32f) { in riscv_cpu_validate_set_extensions()
692 if (cpu->cfg.ext_zvfh && !cpu->cfg.ext_zfhmin) { in riscv_cpu_validate_set_extensions()
697 if (cpu->cfg.ext_zvfbfmin && !cpu->cfg.ext_zve32f) { in riscv_cpu_validate_set_extensions()
702 if (cpu->cfg.ext_zvfbfwma && !cpu->cfg.ext_zvfbfmin) { in riscv_cpu_validate_set_extensions()
707 if ((cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinxmin) && !cpu->cfg.ext_zfinx) { in riscv_cpu_validate_set_extensions()
712 if (cpu->cfg.ext_zfinx) { in riscv_cpu_validate_set_extensions()
713 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
717 if (riscv_has_ext(env, RVF)) { in riscv_cpu_validate_set_extensions()
724 if (cpu->cfg.ext_zcmop && !cpu->cfg.ext_zca) { in riscv_cpu_validate_set_extensions()
729 if (mcc->def->misa_mxl_max != MXL_RV32 && cpu->cfg.ext_zcf) { in riscv_cpu_validate_set_extensions()
734 if (!riscv_has_ext(env, RVF) && cpu->cfg.ext_zcf) { in riscv_cpu_validate_set_extensions()
739 if (!riscv_has_ext(env, RVD) && cpu->cfg.ext_zcd) { in riscv_cpu_validate_set_extensions()
744 if ((cpu->cfg.ext_zcf || cpu->cfg.ext_zcd || cpu->cfg.ext_zcb || in riscv_cpu_validate_set_extensions()
751 if (cpu->cfg.ext_zcd && (cpu->cfg.ext_zcmp || cpu->cfg.ext_zcmt)) { in riscv_cpu_validate_set_extensions()
757 if (cpu->cfg.ext_zcmt && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
762 if ((cpu->cfg.ext_zvbb || cpu->cfg.ext_zvkb || cpu->cfg.ext_zvkg || in riscv_cpu_validate_set_extensions()
770 if ((cpu->cfg.ext_zvbc || cpu->cfg.ext_zvknhb) && !cpu->cfg.ext_zve64x) { in riscv_cpu_validate_set_extensions()
777 if (cpu->cfg.ext_zicntr && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
778 if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicntr))) { in riscv_cpu_validate_set_extensions()
785 if (cpu->cfg.ext_zihpm && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
786 if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zihpm))) { in riscv_cpu_validate_set_extensions()
793 if (cpu->cfg.ext_zicfiss) { in riscv_cpu_validate_set_extensions()
794 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
798 if (!riscv_has_ext(env, RVA)) { in riscv_cpu_validate_set_extensions()
802 if (!riscv_has_ext(env, RVS)) { in riscv_cpu_validate_set_extensions()
806 if (!cpu->cfg.ext_zimop) { in riscv_cpu_validate_set_extensions()
810 if (cpu->cfg.ext_zca && !cpu->cfg.ext_zcmop) { in riscv_cpu_validate_set_extensions()
816 if (!cpu->cfg.ext_zihpm) { in riscv_cpu_validate_set_extensions()
821 if (cpu->cfg.ext_zicfilp && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
826 if (mcc->def->misa_mxl_max == MXL_RV32 && cpu->cfg.ext_svukte) { in riscv_cpu_validate_set_extensions()
831 if ((cpu->cfg.ext_smctr || cpu->cfg.ext_ssctr) && in riscv_cpu_validate_set_extensions()
833 if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_smctr)) || in riscv_cpu_validate_set_extensions()
842 if (cpu->cfg.ext_svrsw60t59b && in riscv_cpu_validate_set_extensions()
863 if (profile->satp_mode > satp_max) { in riscv_cpu_validate_profile_satp()
864 if (send_warn) { in riscv_cpu_validate_profile_satp()
885 if (!profile->present || !parent) { in riscv_cpu_check_parent_profile()
902 if (profile->satp_mode != RISCV_PROFILE_ATTR_UNUSED) { in riscv_cpu_validate_profile()
908 if (profile->priv_spec != RISCV_PROFILE_ATTR_UNUSED && in riscv_cpu_validate_profile()
912 if (send_warn) { in riscv_cpu_validate_profile()
923 if (!(profile->misa_ext & bit)) { in riscv_cpu_validate_profile()
927 if (!riscv_has_ext(&cpu->env, bit)) { in riscv_cpu_validate_profile()
930 if (send_warn) { in riscv_cpu_validate_profile()
940 if (!isa_ext_is_enabled(cpu, ext_offset)) { in riscv_cpu_validate_profile()
943 if (send_warn) { in riscv_cpu_validate_profile()
973 if (initialized) { in riscv_cpu_init_implied_exts_rules()
1008 if (!enabled) { in cpu_enable_implied_rule()
1010 if (rule->implied_misa_exts) { in cpu_enable_implied_rule()
1012 if (rule->implied_misa_exts & misa_bits[i]) { in cpu_enable_implied_rule()
1014 * If the user disabled the misa_bit do not re-enable it in cpu_enable_implied_rule()
1017 if (cpu_misa_ext_is_user_set(misa_bits[i]) && in cpu_enable_implied_rule()
1026 if (ir) { in cpu_enable_implied_rule()
1042 if (ir) { in cpu_enable_implied_rule()
1059 if (cpu->cfg.ext_zce) { in cpu_enable_zc_implied_rules()
1065 if (riscv_has_ext(env, RVF) && mcc->def->misa_mxl_max == MXL_RV32) { in cpu_enable_zc_implied_rules()
1071 if (riscv_has_ext(env, RVC) && env->priv_ver >= PRIV_VERSION_1_12_0) { in cpu_enable_zc_implied_rules()
1074 if (riscv_has_ext(env, RVF) && mcc->def->misa_mxl_max == MXL_RV32) { in cpu_enable_zc_implied_rules()
1078 if (riscv_has_ext(env, RVD)) { in cpu_enable_zc_implied_rules()
1094 if (riscv_has_ext(&cpu->env, rule->ext)) { in riscv_cpu_enable_implied_rules()
1101 if (isa_ext_is_enabled(cpu, rule->ext)) { in riscv_cpu_enable_implied_rules()
1116 if (local_err != NULL) { in riscv_tcg_cpu_finalize_features()
1124 if (cpu->cfg.ext_smepmp && !cpu->cfg.pmp) { in riscv_tcg_cpu_finalize_features()
1134 if (local_err != NULL) { in riscv_tcg_cpu_finalize_features()
1139 if (cpu->cfg.pmu_mask) { in riscv_tcg_cpu_finalize_features()
1141 if (local_err != NULL) { in riscv_tcg_cpu_finalize_features()
1146 if (cpu->cfg.ext_sscofpmf) { in riscv_tcg_cpu_finalize_features()
1159 if (decoder_table[i].guard_func && in riscv_tcg_cpu_finalize_dynamic_decoder()
1185 if (profile->u_parent != NULL) { in riscv_cpu_set_profile()
1189 if (profile->s_parent != NULL) { in riscv_cpu_set_profile()
1195 if (profile->enabled) { in riscv_cpu_set_profile()
1199 if (profile->satp_mode != RISCV_PROFILE_ATTR_UNUSED) { in riscv_cpu_set_profile()
1211 if (!(profile->misa_ext & bit)) { in riscv_cpu_set_profile()
1215 if (bit == RVI && !profile->enabled) { in riscv_cpu_set_profile()
1230 if (profile->enabled) { in riscv_cpu_set_profile()
1231 if (cpu_cfg_offset_is_named_feat(ext_offset)) { in riscv_cpu_set_profile()
1254 if (!riscv_cpu_tcg_compatible(cpu)) { in riscv_tcg_cpu_realize()
1264 if (mcc->def->misa_mxl_max >= MXL_RV128 && qemu_tcg_mttcg_enabled()) { in riscv_tcg_cpu_realize()
1276 if (cpu->cfg.ext_sstc) { in riscv_tcg_cpu_realize()
1281 if (riscv_has_ext(env, RVH)) { in riscv_tcg_cpu_realize()
1304 if (!visit_type_bool(v, name, &value, errp)) { in cpu_set_misa_ext_cfg()
1312 if (value == prev_val) { in cpu_set_misa_ext_cfg()
1316 if (value) { in cpu_set_misa_ext_cfg()
1317 if (vendor_cpu) { in cpu_set_misa_ext_cfg()
1324 if (misa_bit == RVH && env->priv_ver < PRIV_VERSION_1_12_0) { in cpu_set_misa_ext_cfg()
1326 * Note: the 'priv_spec' command line option, if present, in cpu_set_misa_ext_cfg()
1386 /* Check if KVM already created the property */ in riscv_cpu_add_misa_properties()
1387 if (object_property_find(cpu_obj, name)) { in riscv_cpu_add_misa_properties()
1396 if (use_def_vals) { in riscv_cpu_add_misa_properties()
1410 if (riscv_cpu_is_vendor(obj)) { in cpu_set_profile()
1416 if (cpu->env.misa_mxl != MXL_RV64) { in cpu_set_profile()
1422 if (!visit_type_bool(v, name, &value, errp)) { in cpu_set_profile()
1454 if (profile->enabled) { in riscv_cpu_add_profiles()
1468 if (!visit_type_bool(v, name, &value, errp)) { in cpu_set_multi_ext_cfg()
1476 if (value == prev_val) { in cpu_set_multi_ext_cfg()
1480 if (value && vendor_cpu) { in cpu_set_multi_ext_cfg()
1487 if (value) { in cpu_set_multi_ext_cfg()
1513 if (!generic_cpu) { in cpu_add_multi_ext_prop()
1595 if (env->misa_mxl != MXL_RV32) { in riscv_init_max_cpu_extensions()
1605 if (cpu->cfg.ext_smrnmi) { in riscv_init_max_cpu_extensions()
1614 if (cpu->cfg.ext_smdbltrp) { in riscv_init_max_cpu_extensions()
1632 if (!misa_ext_implied_rules) { in riscv_tcg_cpu_instance_init()
1636 if (!multi_ext_implied_rules) { in riscv_tcg_cpu_instance_init()
1642 if (riscv_cpu_has_max_extensions(obj)) { in riscv_tcg_cpu_instance_init()