108     PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];  in riscv_pmu_incr_ctr_rv32()  local
126     if (counter->mhpmcounter_val == max_val) {  in riscv_pmu_incr_ctr_rv32()
127         if (counter->mhpmcounterh_val == max_val) {  in riscv_pmu_incr_ctr_rv32()
128             counter->mhpmcounter_val = 0;  in riscv_pmu_incr_ctr_rv32()
129             counter->mhpmcounterh_val = 0;  in riscv_pmu_incr_ctr_rv32()
136             counter->mhpmcounterh_val++;  in riscv_pmu_incr_ctr_rv32()
139         counter->mhpmcounter_val++;  in riscv_pmu_incr_ctr_rv32()
148     PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];  in riscv_pmu_incr_ctr_rv64()  local
167     if (counter->mhpmcounter_val == max_val) {  in riscv_pmu_incr_ctr_rv64()
168         counter->mhpmcounter_val = 0;  in riscv_pmu_incr_ctr_rv64()
175         counter->mhpmcounter_val++;  in riscv_pmu_incr_ctr_rv64()
185  *                      and compute delta. Also to select correct counter
211         counter_arr = env->pmu_fixed_ctrs[1].counter;  in riscv_pmu_icount_update_priv()
251         counter_arr = env->pmu_fixed_ctrs[0].counter;  in riscv_pmu_cycle_update_priv()
312     /* Fixed instret counter */  in riscv_pmu_ctr_monitor_instructions()
338     /* Fixed mcycle counter */  in riscv_pmu_ctr_monitor_cycles()
352     /* Counter zero is not used for event_ctr_map */  in riscv_pmu_ctr_monitor_cycles()
465     PMUCTRState *counter;  in pmu_timer_trigger_irq()  local
486     counter = &env->pmu_ctrs[ctr_idx];  in pmu_timer_trigger_irq()
487     if (counter->irq_overflow_left > 0) {  in pmu_timer_trigger_irq()
489                         counter->irq_overflow_left;  in pmu_timer_trigger_irq()
491         counter->irq_overflow_left = 0;  in pmu_timer_trigger_irq()
496     ctr_val = counter->mhpmcounter_val;  in pmu_timer_trigger_irq()
501                 ((uint64_t)counter->mhpmcounterh_val << 32);  in pmu_timer_trigger_irq()
506      * if the counter has actually overflowed or not by comparing current  in pmu_timer_trigger_irq()
507      * counter value (accommodated for inhibited modes) with software written  in pmu_timer_trigger_irq()
508      * counter value.  in pmu_timer_trigger_irq()
522 /* Timer callback for instret and cycle counter overflow */
537     PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];  in riscv_pmu_setup_timer()  local
574         counter->irq_overflow_left = overflow_left;  in riscv_pmu_setup_timer()