Lines Matching +full:- +full:- +full:disable +full:- +full:numa
2 * RISC-V implementation of KVM hooks
27 #include "qemu/error-report.h"
28 #include "qemu/main-loop.h"
35 #include "accel/accel-cpu-target.h"
38 #include "system/address-spaces.h"
46 #include "chardev/char-fe.h"
49 #include "hw/riscv/numa.h"
89 size_b = cpu->cfg.vlenb; in kvm_riscv_vector_reg_id()
163 target_ulong misa_bit = misa_ext_cfg->offset; in kvm_cpu_get_misa_ext_cfg()
165 CPURISCVState *env = &cpu->env; in kvm_cpu_get_misa_ext_cfg()
166 bool value = env->misa_ext_mask & misa_bit; in kvm_cpu_get_misa_ext_cfg()
176 target_ulong misa_bit = misa_ext_cfg->offset; in kvm_cpu_set_misa_ext_cfg()
178 CPURISCVState *env = &cpu->env; in kvm_cpu_set_misa_ext_cfg()
185 host_bit = env->misa_ext_mask & misa_bit; in kvm_cpu_set_misa_ext_cfg()
192 misa_ext_cfg->user_set = true; in kvm_cpu_set_misa_ext_cfg()
201 "enabled in the host", misa_ext_cfg->name); in kvm_cpu_set_misa_ext_cfg()
206 CPURISCVState *env = &cpu->env; in kvm_riscv_update_cpu_misa_ext()
212 target_ulong misa_bit = misa_cfg->offset; in kvm_riscv_update_cpu_misa_ext()
214 if (!misa_cfg->user_set) { in kvm_riscv_update_cpu_misa_ext()
218 /* If we're here we're going to disable the MISA bit */ in kvm_riscv_update_cpu_misa_ext()
221 misa_cfg->kvm_reg_id); in kvm_riscv_update_cpu_misa_ext()
225 * We're not checking for -EINVAL because if the bit is about in kvm_riscv_update_cpu_misa_ext()
232 misa_cfg->name, ret); in kvm_riscv_update_cpu_misa_ext()
235 env->misa_ext &= ~misa_bit; in kvm_riscv_update_cpu_misa_ext()
241 .prop_size = sizeof(((CPURISCVState *)0)->_env_prop), \
260 return (void *)&cpu->env + csr_cfg->offset; in kvmconfig_get_env_addr()
359 return (void *)&cpu->cfg + kvmcfg->offset; in kvmconfig_get_cfg_addr()
411 if (!multi_ext_cfg->supported) { in kvm_cpu_set_multi_ext_cfg()
419 multi_ext_cfg->name); in kvm_cpu_set_multi_ext_cfg()
425 multi_ext_cfg->user_set = true; in kvm_cpu_set_multi_ext_cfg()
462 if (!multi_ext_cfg->user_set) { in kvm_riscv_update_cpu_cfg_isa_ext()
467 multi_ext_cfg->kvm_reg_id); in kvm_riscv_update_cpu_cfg_isa_ext()
471 if (!reg && ret == -EINVAL) { in kvm_riscv_update_cpu_cfg_isa_ext()
472 warn_report("KVM cannot disable extension %s", in kvm_riscv_update_cpu_cfg_isa_ext()
473 multi_ext_cfg->name); in kvm_riscv_update_cpu_cfg_isa_ext()
476 multi_ext_cfg->name, ret); in kvm_riscv_update_cpu_cfg_isa_ext()
534 for (prop = array; prop && prop->name; prop++) { in riscv_cpu_add_kvm_unavail_prop_array()
535 riscv_cpu_add_kvm_unavail_prop(obj, prop->name); in riscv_cpu_add_kvm_unavail_prop_array()
547 int bit = misa_cfg->offset; in kvm_riscv_add_cpu_user_properties()
549 misa_cfg->name = riscv_get_misa_ext_name(bit); in kvm_riscv_add_cpu_user_properties()
550 misa_cfg->description = riscv_get_misa_ext_description(bit); in kvm_riscv_add_cpu_user_properties()
552 object_property_add(cpu_obj, misa_cfg->name, "bool", in kvm_riscv_add_cpu_user_properties()
556 object_property_set_description(cpu_obj, misa_cfg->name, in kvm_riscv_add_cpu_user_properties()
557 misa_cfg->description); in kvm_riscv_add_cpu_user_properties()
568 object_property_add(cpu_obj, multi_cfg->name, "bool", in kvm_riscv_add_cpu_user_properties()
580 riscv_cpu_add_kvm_unavail_prop(cpu_obj, riscv_profiles[i]->name); in kvm_riscv_add_cpu_user_properties()
589 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_get_regs_core()
595 env->pc = reg; in kvm_riscv_get_regs_core()
603 env->gpr[i] = reg; in kvm_riscv_get_regs_core()
614 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_put_regs_core()
616 reg = env->pc; in kvm_riscv_put_regs_core()
624 reg = env->gpr[i]; in kvm_riscv_put_regs_core()
643 if (!csr_cfg->supported) { in kvm_riscv_get_regs_csr()
647 ret = kvm_get_one_reg(cs, csr_cfg->kvm_reg_id, ®); in kvm_riscv_get_regs_csr()
652 if (csr_cfg->prop_size == sizeof(uint32_t)) { in kvm_riscv_get_regs_csr()
654 } else if (csr_cfg->prop_size == sizeof(uint64_t)) { in kvm_riscv_get_regs_csr()
673 if (!csr_cfg->supported) { in kvm_riscv_put_regs_csr()
677 if (csr_cfg->prop_size == sizeof(uint32_t)) { in kvm_riscv_put_regs_csr()
679 } else if (csr_cfg->prop_size == sizeof(uint64_t)) { in kvm_riscv_put_regs_csr()
685 ret = kvm_set_one_reg(cs, csr_cfg->kvm_reg_id, ®); in kvm_riscv_put_regs_csr()
696 env->mstatus = 0; in kvm_riscv_reset_regs_csr()
697 env->mie = 0; in kvm_riscv_reset_regs_csr()
698 env->stvec = 0; in kvm_riscv_reset_regs_csr()
699 env->sscratch = 0; in kvm_riscv_reset_regs_csr()
700 env->sepc = 0; in kvm_riscv_reset_regs_csr()
701 env->scause = 0; in kvm_riscv_reset_regs_csr()
702 env->stval = 0; in kvm_riscv_reset_regs_csr()
703 env->mip = 0; in kvm_riscv_reset_regs_csr()
704 env->satp = 0; in kvm_riscv_reset_regs_csr()
705 env->scounteren = 0; in kvm_riscv_reset_regs_csr()
706 env->senvcfg = 0; in kvm_riscv_reset_regs_csr()
713 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_get_regs_fp()
722 env->fpr[i] = reg; in kvm_riscv_get_regs_fp()
734 env->fpr[i] = reg; in kvm_riscv_get_regs_fp()
746 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_put_regs_fp()
751 reg = env->fpr[i]; in kvm_riscv_put_regs_fp()
763 reg = env->fpr[i]; in kvm_riscv_put_regs_fp()
777 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_get_regs_timer()
779 if (env->kvm_timer_dirty) { in kvm_riscv_get_regs_timer()
783 KVM_RISCV_GET_TIMER(cs, time, env->kvm_timer_time); in kvm_riscv_get_regs_timer()
784 KVM_RISCV_GET_TIMER(cs, compare, env->kvm_timer_compare); in kvm_riscv_get_regs_timer()
785 KVM_RISCV_GET_TIMER(cs, state, env->kvm_timer_state); in kvm_riscv_get_regs_timer()
786 KVM_RISCV_GET_TIMER(cs, frequency, env->kvm_timer_frequency); in kvm_riscv_get_regs_timer()
788 env->kvm_timer_dirty = true; in kvm_riscv_get_regs_timer()
794 CPURISCVState *env = &RISCV_CPU(cs)->env; in kvm_riscv_put_regs_timer()
796 if (!env->kvm_timer_dirty) { in kvm_riscv_put_regs_timer()
800 KVM_RISCV_SET_TIMER(cs, time, env->kvm_timer_time); in kvm_riscv_put_regs_timer()
801 KVM_RISCV_SET_TIMER(cs, compare, env->kvm_timer_compare); in kvm_riscv_put_regs_timer()
805 * on env->kvm_timer_state == 0, It's better to adapt in KVM, but it in kvm_riscv_put_regs_timer()
809 if (env->kvm_timer_state) { in kvm_riscv_put_regs_timer()
810 KVM_RISCV_SET_TIMER(cs, state, env->kvm_timer_state); in kvm_riscv_put_regs_timer()
820 if (reg != env->kvm_timer_frequency) { in kvm_riscv_put_regs_timer()
825 env->kvm_timer_dirty = false; in kvm_riscv_put_regs_timer()
840 CPURISCVState *env = &cpu->env; in kvm_riscv_get_regs_vector()
853 env->vstart = reg; in kvm_riscv_get_regs_vector()
859 env->vl = reg; in kvm_riscv_get_regs_vector()
865 env->vtype = reg; in kvm_riscv_get_regs_vector()
872 cpu->cfg.vlenb = reg; in kvm_riscv_get_regs_vector()
883 ret = kvm_get_one_reg(cs, vreg_id, &env->vreg[vreg_idx]); in kvm_riscv_get_regs_vector()
896 CPURISCVState *env = &cpu->env; in kvm_riscv_put_regs_vector()
905 reg = env->vstart; in kvm_riscv_put_regs_vector()
911 reg = env->vl; in kvm_riscv_put_regs_vector()
917 reg = env->vtype; in kvm_riscv_put_regs_vector()
924 reg = cpu->cfg.vlenb; in kvm_riscv_put_regs_vector()
936 ret = kvm_set_one_reg(cs, vreg_id, &env->vreg[vreg_idx]); in kvm_riscv_put_regs_vector()
958 int kvmfd = -1, vmfd = -1, cpufd = -1; in kvm_riscv_create_scratch_vcpu()
966 } while (vmfd == -1 && errno == EINTR); in kvm_riscv_create_scratch_vcpu()
975 scratch->kvmfd = kvmfd; in kvm_riscv_create_scratch_vcpu()
976 scratch->vmfd = vmfd; in kvm_riscv_create_scratch_vcpu()
977 scratch->cpufd = cpufd; in kvm_riscv_create_scratch_vcpu()
997 close(scratch->cpufd); in kvm_riscv_destroy_scratch_vcpu()
998 close(scratch->vmfd); in kvm_riscv_destroy_scratch_vcpu()
999 close(scratch->kvmfd); in kvm_riscv_destroy_scratch_vcpu()
1008 reg.addr = (uint64_t)&cpu->cfg.max_satp_mode; in kvm_riscv_init_max_satp_mode()
1009 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_max_satp_mode()
1021 reg.addr = (uint64_t)&cpu->cfg.mvendorid; in kvm_riscv_init_machine_ids()
1022 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_machine_ids()
1028 reg.addr = (uint64_t)&cpu->cfg.marchid; in kvm_riscv_init_machine_ids()
1029 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_machine_ids()
1035 reg.addr = (uint64_t)&cpu->cfg.mimpid; in kvm_riscv_init_machine_ids()
1036 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_machine_ids()
1045 CPURISCVState *env = &cpu->env; in kvm_riscv_init_misa_ext_mask()
1050 reg.addr = (uint64_t)&env->misa_ext_mask; in kvm_riscv_init_misa_ext_mask()
1051 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_misa_ext_mask()
1060 env->misa_ext = env->misa_ext_mask; in kvm_riscv_init_misa_ext_mask()
1070 cbomz_cfg->kvm_reg_id); in kvm_riscv_read_cbomz_blksize()
1072 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_read_cbomz_blksize()
1075 cbomz_cfg->name, ret); in kvm_riscv_read_cbomz_blksize()
1091 multi_ext_cfg->kvm_reg_id); in kvm_riscv_read_multiext_legacy()
1093 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_read_multiext_legacy()
1097 multi_ext_cfg->supported = false; in kvm_riscv_read_multiext_legacy()
1101 multi_ext_cfg->name, strerror(errno)); in kvm_riscv_read_multiext_legacy()
1105 multi_ext_cfg->supported = true; in kvm_riscv_read_multiext_legacy()
1111 if (cpu->cfg.ext_zicbom) { in kvm_riscv_read_multiext_legacy()
1115 if (cpu->cfg.ext_zicboz) { in kvm_riscv_read_multiext_legacy()
1129 reg.id = csr_cfg->kvm_reg_id; in kvm_riscv_read_csr_cfg_legacy()
1131 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_read_csr_cfg_legacy()
1134 csr_cfg->supported = false; in kvm_riscv_read_csr_cfg_legacy()
1137 csr_cfg->name, strerror(errno)); in kvm_riscv_read_csr_cfg_legacy()
1141 csr_cfg->supported = true; in kvm_riscv_read_csr_cfg_legacy()
1152 return -1; in uint64_cmp()
1167 reg_search = bsearch(&kvm_sbi_dbcn.kvm_reg_id, reglist->reg, reglist->n, in kvm_riscv_check_sbi_dbcn_support()
1183 reg_search = bsearch(&kvm_v_vlenb.kvm_reg_id, reglist->reg, reglist->n, in kvm_riscv_read_vlenb()
1190 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_read_vlenb()
1198 cpu->cfg.vlenb = val; in kvm_riscv_read_vlenb()
1210 reg_id = csr_cfg->kvm_reg_id; in kvm_riscv_read_csr_cfg()
1211 reg_search = bsearch(®_id, reglist->reg, reglist->n, in kvm_riscv_read_csr_cfg()
1217 csr_cfg->supported = true; in kvm_riscv_read_csr_cfg()
1231 ret = ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, &rl_struct); in kvm_riscv_init_cfg()
1249 error_report("Error when accessing get-reg-list: %s", in kvm_riscv_init_cfg()
1256 reglist->n = rl_struct.n; in kvm_riscv_init_cfg()
1257 ret = ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, reglist); in kvm_riscv_init_cfg()
1265 qsort(®list->reg, reglist->n, sizeof(uint64_t), uint64_cmp); in kvm_riscv_init_cfg()
1270 multi_ext_cfg->kvm_reg_id); in kvm_riscv_init_cfg()
1271 reg_search = bsearch(®_id, reglist->reg, reglist->n, in kvm_riscv_init_cfg()
1279 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); in kvm_riscv_init_cfg()
1282 multi_ext_cfg->name, strerror(errno)); in kvm_riscv_init_cfg()
1286 multi_ext_cfg->supported = true; in kvm_riscv_init_cfg()
1290 if (cpu->cfg.ext_zicbom) { in kvm_riscv_init_cfg()
1294 if (cpu->cfg.ext_zicboz) { in kvm_riscv_init_cfg()
1298 if (riscv_has_ext(&cpu->env, RVV)) { in kvm_riscv_init_cfg()
1364 __func__, ret, strerror(-ret)); in kvm_riscv_sync_mpstate_to_kvm()
1365 return -1; in kvm_riscv_sync_mpstate_to_kvm()
1398 if (cs->cpu_index == 0) { in kvm_arch_put_registers()
1429 return cpu->cpu_index; in kvm_arch_vcpu_id()
1458 * writing pieces of other cpu->cfg fields in the reg. in kvm_vcpu_set_machine_ids()
1460 reg = cpu->cfg.mvendorid; in kvm_vcpu_set_machine_ids()
1467 ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid); in kvm_vcpu_set_machine_ids()
1473 ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid); in kvm_vcpu_set_machine_ids()
1574 switch (run->riscv_sbi.function_id) { in kvm_riscv_handle_sbi_dbcn()
1577 num_bytes = run->riscv_sbi.args[0]; in kvm_riscv_handle_sbi_dbcn()
1580 run->riscv_sbi.ret[0] = SBI_SUCCESS; in kvm_riscv_handle_sbi_dbcn()
1581 run->riscv_sbi.ret[1] = 0; in kvm_riscv_handle_sbi_dbcn()
1585 addr = run->riscv_sbi.args[1]; in kvm_riscv_handle_sbi_dbcn()
1591 if (riscv_cpu_mxl(&cpu->env) == MXL_RV32) { in kvm_riscv_handle_sbi_dbcn()
1592 addr |= (uint64_t)run->riscv_sbi.args[2] << 32; in kvm_riscv_handle_sbi_dbcn()
1597 if (run->riscv_sbi.function_id == SBI_EXT_DBCN_CONSOLE_READ) { in kvm_riscv_handle_sbi_dbcn()
1598 ret = qemu_chr_fe_read_all(serial_hd(0)->be, buf, num_bytes); in kvm_riscv_handle_sbi_dbcn()
1609 ret = qemu_chr_fe_write_all(serial_hd(0)->be, buf, num_bytes); in kvm_riscv_handle_sbi_dbcn()
1617 run->riscv_sbi.ret[0] = SBI_SUCCESS; in kvm_riscv_handle_sbi_dbcn()
1618 run->riscv_sbi.ret[1] = ret; in kvm_riscv_handle_sbi_dbcn()
1621 ch = run->riscv_sbi.args[0]; in kvm_riscv_handle_sbi_dbcn()
1622 ret = qemu_chr_fe_write_all(serial_hd(0)->be, &ch, sizeof(ch)); in kvm_riscv_handle_sbi_dbcn()
1630 run->riscv_sbi.ret[0] = SBI_SUCCESS; in kvm_riscv_handle_sbi_dbcn()
1631 run->riscv_sbi.ret[1] = 0; in kvm_riscv_handle_sbi_dbcn()
1634 run->riscv_sbi.ret[0] = SBI_ERR_NOT_SUPPORTED; in kvm_riscv_handle_sbi_dbcn()
1642 switch (run->riscv_sbi.extension_id) { in kvm_riscv_handle_sbi()
1644 ch = run->riscv_sbi.args[0]; in kvm_riscv_handle_sbi()
1645 qemu_chr_fe_write(serial_hd(0)->be, &ch, sizeof(ch)); in kvm_riscv_handle_sbi()
1648 ret = qemu_chr_fe_read_all(serial_hd(0)->be, &ch, sizeof(ch)); in kvm_riscv_handle_sbi()
1650 run->riscv_sbi.ret[0] = ch; in kvm_riscv_handle_sbi()
1652 run->riscv_sbi.ret[0] = -1; in kvm_riscv_handle_sbi()
1661 "%s: un-handled SBI EXIT, specific reasons is %lu\n", in kvm_riscv_handle_sbi()
1662 __func__, run->riscv_sbi.extension_id); in kvm_riscv_handle_sbi()
1663 ret = -1; in kvm_riscv_handle_sbi()
1671 target_ulong csr_num = run->riscv_csr.csr_num; in kvm_riscv_handle_csr()
1672 target_ulong new_value = run->riscv_csr.new_value; in kvm_riscv_handle_csr()
1673 target_ulong write_mask = run->riscv_csr.write_mask; in kvm_riscv_handle_csr()
1678 run->riscv_csr.ret_value = riscv_new_csr_seed(new_value, write_mask); in kvm_riscv_handle_csr()
1682 "%s: un-handled CSR EXIT for CSR %lx\n", in kvm_riscv_handle_csr()
1684 ret = -1; in kvm_riscv_handle_csr()
1694 CPURISCVState *env = &cpu->env; in kvm_riscv_handle_debug()
1699 if (kvm_find_sw_breakpoint(cs, env->pc)) { in kvm_riscv_handle_debug()
1709 switch (run->exit_reason) { in kvm_arch_handle_exit()
1722 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", in kvm_arch_handle_exit()
1723 __func__, run->exit_reason); in kvm_arch_handle_exit()
1724 ret = -1; in kvm_arch_handle_exit()
1732 CPURISCVState *env = &cpu->env; in kvm_riscv_reset_vcpu()
1736 env->gpr[i] = 0; in kvm_riscv_reset_vcpu()
1738 env->pc = cpu->env.kernel_addr; in kvm_riscv_reset_vcpu()
1739 env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */ in kvm_riscv_reset_vcpu()
1740 env->gpr[11] = cpu->env.fdt_addr; /* a1 */ in kvm_riscv_reset_vcpu()
1798 object_class_property_add_str(oc, "riscv-aia", riscv_get_kvm_aia, in kvm_arch_accel_class_init()
1800 object_class_property_set_description(oc, "riscv-aia", in kvm_arch_accel_class_init()
1804 object_property_set_default_str(object_class_property_find(oc, "riscv-aia"), in kvm_arch_accel_class_init()
1814 int aia_fd = -1; in kvm_riscv_aia_create()
1825 error_report("Unable to create in-kernel irqchip"); in kvm_riscv_aia_create()
1886 max_group_id = socket_count - 1; in kvm_riscv_aia_create()
1938 max_hart_per_socket--; in kvm_riscv_aia_create()
1985 * -> cpu_exec_realizefn()
1986 * -> kvm_cpu_realize() (via accel_cpu_common_realize())
1993 if (riscv_has_ext(&cpu->env, RVV)) { in kvm_cpu_realize()
2007 CPURISCVState *env = &cpu->env; in riscv_kvm_cpu_finalize_features()
2013 /* short-circuit without spinning the scratch CPU */ in riscv_kvm_cpu_finalize_features()
2014 if (!cpu->cfg.ext_zicbom && !cpu->cfg.ext_zicboz && in riscv_kvm_cpu_finalize_features()
2024 if (cpu->cfg.ext_zicbom && in riscv_kvm_cpu_finalize_features()
2036 if (cpu->cfg.cbom_blocksize != val) { in riscv_kvm_cpu_finalize_features()
2043 if (cpu->cfg.ext_zicboz && in riscv_kvm_cpu_finalize_features()
2055 if (cpu->cfg.cboz_blocksize != val) { in riscv_kvm_cpu_finalize_features()
2077 if (cpu->cfg.vlenb != val) { in riscv_kvm_cpu_finalize_features()
2091 acc->cpu_instance_init = kvm_cpu_instance_init; in kvm_cpu_accel_class_init()
2092 acc->cpu_target_realize = kvm_cpu_realize; in kvm_cpu_accel_class_init()
2117 .cfg.max_satp_mode = -1,
2124 .cfg.max_satp_mode = -1,
2137 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 2, 0)) { in kvm_arch_insert_sw_breakpoint()
2138 return -EINVAL; in kvm_arch_insert_sw_breakpoint()
2141 if ((bp->saved_insn & 0x3) == 0x3) { in kvm_arch_insert_sw_breakpoint()
2142 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) in kvm_arch_insert_sw_breakpoint()
2143 || cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&ebreak_insn, 4, 1)) { in kvm_arch_insert_sw_breakpoint()
2144 return -EINVAL; in kvm_arch_insert_sw_breakpoint()
2147 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&c_ebreak_insn, 2, 1)) { in kvm_arch_insert_sw_breakpoint()
2148 return -EINVAL; in kvm_arch_insert_sw_breakpoint()
2160 if ((bp->saved_insn & 0x3) == 0x3) { in kvm_arch_remove_sw_breakpoint()
2161 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&ebreak, 4, 0) || in kvm_arch_remove_sw_breakpoint()
2163 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 1)) { in kvm_arch_remove_sw_breakpoint()
2164 return -EINVAL; in kvm_arch_remove_sw_breakpoint()
2167 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&c_ebreak, 2, 0) || in kvm_arch_remove_sw_breakpoint()
2169 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 2, 1)) { in kvm_arch_remove_sw_breakpoint()
2170 return -EINVAL; in kvm_arch_remove_sw_breakpoint()
2180 return -EINVAL; in kvm_arch_insert_hw_breakpoint()
2186 return -EINVAL; in kvm_arch_remove_hw_breakpoint()
2197 dbg->control |= KVM_GUESTDBG_ENABLE; in kvm_arch_update_guest_debug()