target/riscv/instmap.h

22 #define MASK_OP_MAJOR(op)  (op & 0x7F)
25     OPC_RISC_LUI    = (0x37),
26     OPC_RISC_AUIPC  = (0x17),
27     OPC_RISC_JAL    = (0x6F),
28     OPC_RISC_JALR   = (0x67),
29     OPC_RISC_BRANCH = (0x63),
30     OPC_RISC_LOAD   = (0x03),
31     OPC_RISC_STORE  = (0x23),
32     OPC_RISC_ARITH_IMM  = (0x13),
33     OPC_RISC_ARITH      = (0x33),
34     OPC_RISC_FENCE      = (0x0F),
35     OPC_RISC_SYSTEM     = (0x73),
38     OPC_RISC_ARITH_IMM_W = (0x1B),
39     OPC_RISC_ARITH_W = (0x3B),
42     OPC_RISC_ATOMIC = (0x2F),
45     OPC_RISC_FP_LOAD = (0x7),
46     OPC_RISC_FP_STORE = (0x27),
48     OPC_RISC_FMADD = (0x43),
49     OPC_RISC_FMSUB = (0x47),
50     OPC_RISC_FNMSUB = (0x4B),
51     OPC_RISC_FNMADD = (0x4F),
53     OPC_RISC_FP_ARITH = (0x53),
56 #define MASK_OP_ARITH(op)   (MASK_OP_MAJOR(op) | (op & ((0x7 << 12) | \
57                             (0x7F << 25))))
59     OPC_RISC_ADD   = OPC_RISC_ARITH | (0x0 << 12) | (0x00 << 25),
60     OPC_RISC_SUB   = OPC_RISC_ARITH | (0x0 << 12) | (0x20 << 25),
61     OPC_RISC_SLL   = OPC_RISC_ARITH | (0x1 << 12) | (0x00 << 25),
62     OPC_RISC_SLT   = OPC_RISC_ARITH | (0x2 << 12) | (0x00 << 25),
63     OPC_RISC_SLTU  = OPC_RISC_ARITH | (0x3 << 12) | (0x00 << 25),
64     OPC_RISC_XOR   = OPC_RISC_ARITH | (0x4 << 12) | (0x00 << 25),
65     OPC_RISC_SRL   = OPC_RISC_ARITH | (0x5 << 12) | (0x00 << 25),
66     OPC_RISC_SRA   = OPC_RISC_ARITH | (0x5 << 12) | (0x20 << 25),
67     OPC_RISC_OR    = OPC_RISC_ARITH | (0x6 << 12) | (0x00 << 25),
68     OPC_RISC_AND   = OPC_RISC_ARITH | (0x7 << 12) | (0x00 << 25),
71     OPC_RISC_MUL    = OPC_RISC_ARITH | (0x0 << 12) | (0x01 << 25),
72     OPC_RISC_MULH   = OPC_RISC_ARITH | (0x1 << 12) | (0x01 << 25),
73     OPC_RISC_MULHSU = OPC_RISC_ARITH | (0x2 << 12) | (0x01 << 25),
74     OPC_RISC_MULHU  = OPC_RISC_ARITH | (0x3 << 12) | (0x01 << 25),
76     OPC_RISC_DIV    = OPC_RISC_ARITH | (0x4 << 12) | (0x01 << 25),
77     OPC_RISC_DIVU   = OPC_RISC_ARITH | (0x5 << 12) | (0x01 << 25),
78     OPC_RISC_REM    = OPC_RISC_ARITH | (0x6 << 12) | (0x01 << 25),
79     OPC_RISC_REMU   = OPC_RISC_ARITH | (0x7 << 12) | (0x01 << 25),
83 #define MASK_OP_ARITH_IMM(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
85     OPC_RISC_ADDI   = OPC_RISC_ARITH_IMM | (0x0 << 12),
86     OPC_RISC_SLTI   = OPC_RISC_ARITH_IMM | (0x2 << 12),
87     OPC_RISC_SLTIU  = OPC_RISC_ARITH_IMM | (0x3 << 12),
88     OPC_RISC_XORI   = OPC_RISC_ARITH_IMM | (0x4 << 12),
89     OPC_RISC_ORI    = OPC_RISC_ARITH_IMM | (0x6 << 12),
90     OPC_RISC_ANDI   = OPC_RISC_ARITH_IMM | (0x7 << 12),
91     OPC_RISC_SLLI   = OPC_RISC_ARITH_IMM | (0x1 << 12), /* additional part of
93     OPC_RISC_SHIFT_RIGHT_I = OPC_RISC_ARITH_IMM | (0x5 << 12) /* SRAI, SRLI */
96 #define MASK_OP_BRANCH(op)     (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
98     OPC_RISC_BEQ  = OPC_RISC_BRANCH  | (0x0  << 12),
99     OPC_RISC_BNE  = OPC_RISC_BRANCH  | (0x1  << 12),
100     OPC_RISC_BLT  = OPC_RISC_BRANCH  | (0x4  << 12),
101     OPC_RISC_BGE  = OPC_RISC_BRANCH  | (0x5  << 12),
102     OPC_RISC_BLTU = OPC_RISC_BRANCH  | (0x6  << 12),
103     OPC_RISC_BGEU = OPC_RISC_BRANCH  | (0x7  << 12)
107     OPC_RISC_ADDIW   = OPC_RISC_ARITH_IMM_W | (0x0 << 12),
108     OPC_RISC_SLLIW   = OPC_RISC_ARITH_IMM_W | (0x1 << 12), /* additional part of
110     OPC_RISC_SHIFT_RIGHT_IW = OPC_RISC_ARITH_IMM_W | (0x5 << 12) /* SRAI, SRLI
115     OPC_RISC_ADDW   = OPC_RISC_ARITH_W | (0x0 << 12) | (0x00 << 25),
116     OPC_RISC_SUBW   = OPC_RISC_ARITH_W | (0x0 << 12) | (0x20 << 25),
117     OPC_RISC_SLLW   = OPC_RISC_ARITH_W | (0x1 << 12) | (0x00 << 25),
118     OPC_RISC_SRLW   = OPC_RISC_ARITH_W | (0x5 << 12) | (0x00 << 25),
119     OPC_RISC_SRAW   = OPC_RISC_ARITH_W | (0x5 << 12) | (0x20 << 25),
122     OPC_RISC_MULW   = OPC_RISC_ARITH_W | (0x0 << 12) | (0x01 << 25),
123     OPC_RISC_DIVW   = OPC_RISC_ARITH_W | (0x4 << 12) | (0x01 << 25),
124     OPC_RISC_DIVUW  = OPC_RISC_ARITH_W | (0x5 << 12) | (0x01 << 25),
125     OPC_RISC_REMW   = OPC_RISC_ARITH_W | (0x6 << 12) | (0x01 << 25),
126     OPC_RISC_REMUW  = OPC_RISC_ARITH_W | (0x7 << 12) | (0x01 << 25),
129 #define MASK_OP_LOAD(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
131     OPC_RISC_LB   = OPC_RISC_LOAD | (0x0 << 12),
132     OPC_RISC_LH   = OPC_RISC_LOAD | (0x1 << 12),
133     OPC_RISC_LW   = OPC_RISC_LOAD | (0x2 << 12),
134     OPC_RISC_LD   = OPC_RISC_LOAD | (0x3 << 12),
135     OPC_RISC_LBU  = OPC_RISC_LOAD | (0x4 << 12),
136     OPC_RISC_LHU  = OPC_RISC_LOAD | (0x5 << 12),
137     OPC_RISC_LWU  = OPC_RISC_LOAD | (0x6 << 12),
140 #define MASK_OP_STORE(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
142     OPC_RISC_SB   = OPC_RISC_STORE | (0x0 << 12),
143     OPC_RISC_SH   = OPC_RISC_STORE | (0x1 << 12),
144     OPC_RISC_SW   = OPC_RISC_STORE | (0x2 << 12),
145     OPC_RISC_SD   = OPC_RISC_STORE | (0x3 << 12),
148 #define MASK_OP_JALR(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
152     (MASK_OP_MAJOR(op) | (op & ((0x7 << 12) | (0x7F << 25))))
154     (MASK_OP_MAJOR(op) | (op & (0x1F << 27)))
157     OPC_RISC_LR          = OPC_RISC_ATOMIC | (0x02 << 27),
158     OPC_RISC_SC          = OPC_RISC_ATOMIC | (0x03 << 27),
159     OPC_RISC_AMOSWAP     = OPC_RISC_ATOMIC | (0x01 << 27),
160     OPC_RISC_AMOADD      = OPC_RISC_ATOMIC | (0x00 << 27),
161     OPC_RISC_AMOXOR      = OPC_RISC_ATOMIC | (0x04 << 27),
162     OPC_RISC_AMOAND      = OPC_RISC_ATOMIC | (0x0C << 27),
163     OPC_RISC_AMOOR       = OPC_RISC_ATOMIC | (0x08 << 27),
164     OPC_RISC_AMOMIN      = OPC_RISC_ATOMIC | (0x10 << 27),
165     OPC_RISC_AMOMAX      = OPC_RISC_ATOMIC | (0x14 << 27),
166     OPC_RISC_AMOMINU     = OPC_RISC_ATOMIC | (0x18 << 27),
167     OPC_RISC_AMOMAXU     = OPC_RISC_ATOMIC | (0x1C << 27),
170 #define MASK_OP_SYSTEM(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
172     OPC_RISC_ECALL       = OPC_RISC_SYSTEM | (0x0 << 12),
173     OPC_RISC_EBREAK      = OPC_RISC_SYSTEM | (0x0 << 12),
174     OPC_RISC_ERET        = OPC_RISC_SYSTEM | (0x0 << 12),
175     OPC_RISC_MRTS        = OPC_RISC_SYSTEM | (0x0 << 12),
176     OPC_RISC_MRTH        = OPC_RISC_SYSTEM | (0x0 << 12),
177     OPC_RISC_HRTS        = OPC_RISC_SYSTEM | (0x0 << 12),
178     OPC_RISC_WFI         = OPC_RISC_SYSTEM | (0x0 << 12),
179     OPC_RISC_SFENCEVM    = OPC_RISC_SYSTEM | (0x0 << 12),
181     OPC_RISC_CSRRW       = OPC_RISC_SYSTEM | (0x1 << 12),
182     OPC_RISC_CSRRS       = OPC_RISC_SYSTEM | (0x2 << 12),
183     OPC_RISC_CSRRC       = OPC_RISC_SYSTEM | (0x3 << 12),
184     OPC_RISC_CSRRWI      = OPC_RISC_SYSTEM | (0x5 << 12),
185     OPC_RISC_CSRRSI      = OPC_RISC_SYSTEM | (0x6 << 12),
186     OPC_RISC_CSRRCI      = OPC_RISC_SYSTEM | (0x7 << 12),
188     OPC_RISC_HLVHSV      = OPC_RISC_SYSTEM | (0x4 << 12),
191 #define MASK_OP_FP_LOAD(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
193     OPC_RISC_FLW   = OPC_RISC_FP_LOAD | (0x2 << 12),
194     OPC_RISC_FLD   = OPC_RISC_FP_LOAD | (0x3 << 12),
197 #define MASK_OP_FP_STORE(op)   (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
199     OPC_RISC_FSW   = OPC_RISC_FP_STORE | (0x2 << 12),
200     OPC_RISC_FSD   = OPC_RISC_FP_STORE | (0x3 << 12),
203 #define MASK_OP_FP_FMADD(op)   (MASK_OP_MAJOR(op) | (op & (0x3 << 25)))
205     OPC_RISC_FMADD_S = OPC_RISC_FMADD | (0x0 << 25),
206     OPC_RISC_FMADD_D = OPC_RISC_FMADD | (0x1 << 25),
209 #define MASK_OP_FP_FMSUB(op)   (MASK_OP_MAJOR(op) | (op & (0x3 << 25)))
211     OPC_RISC_FMSUB_S = OPC_RISC_FMSUB | (0x0 << 25),
212     OPC_RISC_FMSUB_D = OPC_RISC_FMSUB | (0x1 << 25),
215 #define MASK_OP_FP_FNMADD(op)   (MASK_OP_MAJOR(op) | (op & (0x3 << 25)))
217     OPC_RISC_FNMADD_S = OPC_RISC_FNMADD | (0x0 << 25),
218     OPC_RISC_FNMADD_D = OPC_RISC_FNMADD | (0x1 << 25),
221 #define MASK_OP_FP_FNMSUB(op)   (MASK_OP_MAJOR(op) | (op & (0x3 << 25)))
223     OPC_RISC_FNMSUB_S = OPC_RISC_FNMSUB | (0x0 << 25),
224     OPC_RISC_FNMSUB_D = OPC_RISC_FNMSUB | (0x1 << 25),
227 #define MASK_OP_FP_ARITH(op)   (MASK_OP_MAJOR(op) | (op & (0x7F << 25)))
230     OPC_RISC_FADD_S    = OPC_RISC_FP_ARITH | (0x0 << 25),
231     OPC_RISC_FSUB_S    = OPC_RISC_FP_ARITH | (0x4 << 25),
232     OPC_RISC_FMUL_S    = OPC_RISC_FP_ARITH | (0x8 << 25),
233     OPC_RISC_FDIV_S    = OPC_RISC_FP_ARITH | (0xC << 25),
235     OPC_RISC_FSGNJ_S   = OPC_RISC_FP_ARITH | (0x10 << 25),
236     OPC_RISC_FSGNJN_S  = OPC_RISC_FP_ARITH | (0x10 << 25),
237     OPC_RISC_FSGNJX_S  = OPC_RISC_FP_ARITH | (0x10 << 25),
239     OPC_RISC_FMIN_S    = OPC_RISC_FP_ARITH | (0x14 << 25),
240     OPC_RISC_FMAX_S    = OPC_RISC_FP_ARITH | (0x14 << 25),
242     OPC_RISC_FSQRT_S   = OPC_RISC_FP_ARITH | (0x2C << 25),
244     OPC_RISC_FEQ_S     = OPC_RISC_FP_ARITH | (0x50 << 25),
245     OPC_RISC_FLT_S     = OPC_RISC_FP_ARITH | (0x50 << 25),
246     OPC_RISC_FLE_S     = OPC_RISC_FP_ARITH | (0x50 << 25),
248     OPC_RISC_FCVT_W_S  = OPC_RISC_FP_ARITH | (0x60 << 25),
249     OPC_RISC_FCVT_WU_S = OPC_RISC_FP_ARITH | (0x60 << 25),
250     OPC_RISC_FCVT_L_S  = OPC_RISC_FP_ARITH | (0x60 << 25),
251     OPC_RISC_FCVT_LU_S = OPC_RISC_FP_ARITH | (0x60 << 25),
253     OPC_RISC_FCVT_S_W  = OPC_RISC_FP_ARITH | (0x68 << 25),
254     OPC_RISC_FCVT_S_WU = OPC_RISC_FP_ARITH | (0x68 << 25),
255     OPC_RISC_FCVT_S_L  = OPC_RISC_FP_ARITH | (0x68 << 25),
256     OPC_RISC_FCVT_S_LU = OPC_RISC_FP_ARITH | (0x68 << 25),
258     OPC_RISC_FMV_X_S   = OPC_RISC_FP_ARITH | (0x70 << 25),
259     OPC_RISC_FCLASS_S  = OPC_RISC_FP_ARITH | (0x70 << 25),
261     OPC_RISC_FMV_S_X   = OPC_RISC_FP_ARITH | (0x78 << 25),
264     OPC_RISC_FADD_D    = OPC_RISC_FP_ARITH | (0x1 << 25),
265     OPC_RISC_FSUB_D    = OPC_RISC_FP_ARITH | (0x5 << 25),
266     OPC_RISC_FMUL_D    = OPC_RISC_FP_ARITH | (0x9 << 25),
267     OPC_RISC_FDIV_D    = OPC_RISC_FP_ARITH | (0xD << 25),
269     OPC_RISC_FSGNJ_D   = OPC_RISC_FP_ARITH | (0x11 << 25),
270     OPC_RISC_FSGNJN_D  = OPC_RISC_FP_ARITH | (0x11 << 25),
271     OPC_RISC_FSGNJX_D  = OPC_RISC_FP_ARITH | (0x11 << 25),
273     OPC_RISC_FMIN_D    = OPC_RISC_FP_ARITH | (0x15 << 25),
274     OPC_RISC_FMAX_D    = OPC_RISC_FP_ARITH | (0x15 << 25),
276     OPC_RISC_FCVT_S_D = OPC_RISC_FP_ARITH | (0x20 << 25),
278     OPC_RISC_FCVT_D_S = OPC_RISC_FP_ARITH | (0x21 << 25),
280     OPC_RISC_FSQRT_D   = OPC_RISC_FP_ARITH | (0x2D << 25),
282     OPC_RISC_FEQ_D     = OPC_RISC_FP_ARITH | (0x51 << 25),
283     OPC_RISC_FLT_D     = OPC_RISC_FP_ARITH | (0x51 << 25),
284     OPC_RISC_FLE_D     = OPC_RISC_FP_ARITH | (0x51 << 25),
286     OPC_RISC_FCVT_W_D  = OPC_RISC_FP_ARITH | (0x61 << 25),
287     OPC_RISC_FCVT_WU_D = OPC_RISC_FP_ARITH | (0x61 << 25),
288     OPC_RISC_FCVT_L_D  = OPC_RISC_FP_ARITH | (0x61 << 25),
289     OPC_RISC_FCVT_LU_D = OPC_RISC_FP_ARITH | (0x61 << 25),
291     OPC_RISC_FCVT_D_W  = OPC_RISC_FP_ARITH | (0x69 << 25),
292     OPC_RISC_FCVT_D_WU = OPC_RISC_FP_ARITH | (0x69 << 25),
293     OPC_RISC_FCVT_D_L  = OPC_RISC_FP_ARITH | (0x69 << 25),
294     OPC_RISC_FCVT_D_LU = OPC_RISC_FP_ARITH | (0x69 << 25),
296     OPC_RISC_FMV_X_D   = OPC_RISC_FP_ARITH | (0x71 << 25),
297     OPC_RISC_FCLASS_D  = OPC_RISC_FP_ARITH | (0x71 << 25),
299     OPC_RISC_FMV_D_X   = OPC_RISC_FP_ARITH | (0x79 << 25),
382 #define GET_C_OP(inst)             extract32(inst, 0, 2)
386     OPC_RISC_C_OP_QUAD0 = 0x0,
387     OPC_RISC_C_OP_QUAD1 = 0x1,
388     OPC_RISC_C_OP_QUAD2 = 0x2
392     /* RVC Quadrant 0 */
393     OPC_RISC_C_FUNC_ADDI4SPN = 0x0,
394     OPC_RISC_C_FUNC_FLD_LQ = 0x1,
395     OPC_RISC_C_FUNC_LW = 0x2,
396     OPC_RISC_C_FUNC_FLW_LD = 0x3,
397     OPC_RISC_C_FUNC_FSD_SQ = 0x5,
398     OPC_RISC_C_FUNC_SW = 0x6,
399     OPC_RISC_C_FUNC_FSW_SD = 0x7
404     OPC_RISC_C_FUNC_SLLI_SLLI64 = 0x0,
405     OPC_RISC_C_FUNC_FLDSP_LQSP = 0x1,
406     OPC_RISC_C_FUNC_LWSP = 0x2,
407     OPC_RISC_C_FUNC_FLWSP_LDSP = 0x3,
408     OPC_RISC_C_FUNC_JR_MV_EBREAK_JALR_ADD = 0x4,
409     OPC_RISC_C_FUNC_FSDSP_SQSP = 0x5,
410     OPC_RISC_C_FUNC_SWSP = 0x6,
411     OPC_RISC_C_FUNC_FSWSP_SDSP = 0x7