114     int ctr_index;  in ctr()  local
123     ctr_index = csrno - base_csrno;  in ctr()
124     ctr_mask = BIT(ctr_index);  in ctr()
220     int ctr_index;  in mctr()  local
230     ctr_index = csrno - base_csrno;  in mctr()
231     if ((BIT(ctr_index) & pmu_avail_ctrs >> 3) == 0) {  in mctr()
1402     uint16_t ctr_index;  in read_hpmcounter()  local
1405         ctr_index = csrno - CSR_MCYCLE;  in read_hpmcounter()
1407         ctr_index = csrno - CSR_CYCLE;  in read_hpmcounter()
1412     return riscv_pmu_read_ctr(env, val, false, ctr_index);  in read_hpmcounter()
1418     uint16_t ctr_index;  in read_hpmcounterh()  local
1421         ctr_index = csrno - CSR_MCYCLEH;  in read_hpmcounterh()
1423         ctr_index = csrno - CSR_CYCLEH;  in read_hpmcounterh()
1428     return riscv_pmu_read_ctr(env, val, true, ctr_index);  in read_hpmcounterh()
2712     int ctr_index = isel - ISELECT_CD_FIRST;  in rmw_xireg_cd()  local
2721     if (ctr_index == 1) {  in rmw_xireg_cd()
2745     if (!get_field(env->mcounteren, BIT(ctr_index)) ||  in rmw_xireg_cd()
2752         ret = rmw_cd_mhpmcounter(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()
2755         ret = rmw_cd_mhpmcounterh(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()
2758         if (ctr_index <= 2) {  in rmw_xireg_cd()
2759             ret = rmw_cd_ctr_cfg(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()
2761             ret = rmw_cd_mhpmevent(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()
2765         if (ctr_index <= 2) {  in rmw_xireg_cd()
2766             ret = rmw_cd_ctr_cfgh(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()
2768             ret = rmw_cd_mhpmeventh(env, ctr_index, val, new_val, wr_mask);  in rmw_xireg_cd()