477     if (riscv_has_ext(env, RVU)) {  in umode()
1071         inh_avail_mask |= riscv_has_ext(env, RVU) ? MCYCLECFG_BIT_UINH : 0;  in write_mcyclecfg()
1074                            riscv_has_ext(env, RVU)) ? MCYCLECFG_BIT_VUINH : 0;  in write_mcyclecfg()
1097     inh_avail_mask |= riscv_has_ext(env, RVU) ? MCYCLECFGH_BIT_UINH : 0;  in write_mcyclecfgh()
1100                        riscv_has_ext(env, RVU)) ? MCYCLECFGH_BIT_VUINH : 0;  in write_mcyclecfgh()
1124         inh_avail_mask |= riscv_has_ext(env, RVU) ? MINSTRETCFG_BIT_UINH : 0;  in write_minstretcfg()
1127                            riscv_has_ext(env, RVU)) ? MINSTRETCFG_BIT_VUINH : 0;  in write_minstretcfg()
1148     inh_avail_mask |= riscv_has_ext(env, RVU) ? MINSTRETCFGH_BIT_UINH : 0;  in write_minstretcfgh()
1151                        riscv_has_ext(env, RVU)) ? MINSTRETCFGH_BIT_VUINH : 0;  in write_minstretcfgh()
1182         inh_avail_mask |= riscv_has_ext(env, RVU) ? MHPMEVENT_BIT_UINH : 0;  in write_mhpmevent()
1185                            riscv_has_ext(env, RVU)) ? MHPMEVENT_BIT_VUINH : 0;  in write_mhpmevent()
1216     inh_avail_mask |= riscv_has_ext(env, RVU) ? MHPMEVENTH_BIT_UINH : 0;  in write_mhpmeventh()
1219                        riscv_has_ext(env, RVU)) ? MHPMEVENTH_BIT_VUINH : 0;  in write_mhpmeventh()
1964         valid = riscv_has_ext(env, RVU);  in legalize_mpp()