Lines Matching refs:virt

45     bool virt = env->virt_enabled;  in riscv_env_mmu_index()
54 virt = get_field(env->mstatus, MSTATUS_MPV) && in riscv_env_mmu_index()
56 if (virt) { in riscv_env_mmu_index()
65 return mode | (virt ? MMU_2STAGE_BIT : 0); in riscv_env_mmu_index()
125 bool riscv_env_smode_dbltrp_enabled(CPURISCVState *env, bool virt) in riscv_env_smode_dbltrp_enabled() argument
130 if (virt) { in riscv_env_smode_dbltrp_enabled()
784 bool virt) in riscv_ctr_freeze() argument
786 uint64_t ctl = virt ? env->vsctrctl : env->mctrctl; in riscv_ctr_freeze()
802 static uint64_t riscv_ctr_priv_to_mask(target_ulong priv, bool virt) in riscv_ctr_priv_to_mask() argument
808 if (virt) { in riscv_ctr_priv_to_mask()
813 if (virt) { in riscv_ctr_priv_to_mask()
823 bool virt) in riscv_ctr_get_control() argument
830 if (virt) { in riscv_ctr_get_control()
1118 int mode, bool virt) in do_svukte_check() argument
1132 if (env->priv == PRV_U && !env->virt_enabled && virt) { in do_svukte_check()
1202 bool virt = mmuidx_2stage(mmu_idx); in get_physical_address() local
1210 if (do_svukte_check(env, first_stage, mode, virt) && in get_physical_address()
2129 static void riscv_do_nmi(CPURISCVState *env, target_ulong cause, bool virt) in riscv_do_nmi() argument
2132 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPV, virt); in riscv_do_nmi()
2156 bool virt = env->virt_enabled; in riscv_cpu_do_interrupt() local
2342 virt = false; in riscv_cpu_do_interrupt()
2355 if (riscv_env_smode_dbltrp_enabled(env, virt)) { in riscv_cpu_do_interrupt()
2367 riscv_cpu_set_mode(env, PRV_S, virt); in riscv_cpu_do_interrupt()
2403 virt = false; in riscv_cpu_do_interrupt()
2453 riscv_cpu_set_mode(env, PRV_M, virt); in riscv_cpu_do_interrupt()
2459 riscv_ctr_freeze(env, XCTRCTL_LCOFIFRZ, virt); in riscv_cpu_do_interrupt()
2461 riscv_ctr_freeze(env, XCTRCTL_BPFRZ, virt); in riscv_cpu_do_interrupt()