556             cs->exception_index = RISCV_EXCP_INT_FLAG | interruptno;  in riscv_cpu_exec_interrupt()
1626             cs->exception_index = RISCV_EXCP_INST_ACCESS_FAULT;  in raise_mmu_exception()
1628             cs->exception_index = RISCV_EXCP_INST_GUEST_PAGE_FAULT;  in raise_mmu_exception()
1630             cs->exception_index = RISCV_EXCP_INST_PAGE_FAULT;  in raise_mmu_exception()
1635             cs->exception_index = RISCV_EXCP_LOAD_ACCESS_FAULT;  in raise_mmu_exception()
1637             cs->exception_index = RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT;  in raise_mmu_exception()
1639             cs->exception_index = RISCV_EXCP_LOAD_PAGE_FAULT;  in raise_mmu_exception()
1644             cs->exception_index = RISCV_EXCP_STORE_AMO_ACCESS_FAULT;  in raise_mmu_exception()
1646             cs->exception_index = RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT;  in raise_mmu_exception()
1648             cs->exception_index = RISCV_EXCP_STORE_PAGE_FAULT;  in raise_mmu_exception()
1692         cs->exception_index = RISCV_EXCP_STORE_AMO_ACCESS_FAULT;  in riscv_cpu_do_transaction_failed()
1694         cs->exception_index = RISCV_EXCP_LOAD_ACCESS_FAULT;  in riscv_cpu_do_transaction_failed()
1696         cs->exception_index = RISCV_EXCP_INST_ACCESS_FAULT;  in riscv_cpu_do_transaction_failed()
1713         cs->exception_index = RISCV_EXCP_INST_ADDR_MIS;  in riscv_cpu_do_unaligned_access()
1716         cs->exception_index = RISCV_EXCP_LOAD_ADDR_MIS;  in riscv_cpu_do_unaligned_access()
1719             cs->exception_index = RISCV_EXCP_LOAD_ACCESS_FAULT;  in riscv_cpu_do_unaligned_access()
1723         cs->exception_index = RISCV_EXCP_STORE_AMO_ADDR_MIS;  in riscv_cpu_do_unaligned_access()
1726             cs->exception_index = RISCV_EXCP_STORE_AMO_ACCESS_FAULT;  in riscv_cpu_do_unaligned_access()
2167     bool async = !!(cs->exception_index & RISCV_EXCP_INT_FLAG);  in riscv_cpu_do_interrupt()
2168     target_ulong cause = cs->exception_index & RISCV_EXCP_INT_MASK;  in riscv_cpu_do_interrupt()