40 int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)  in riscv_env_mmu_index()
69 bool cpu_get_fcfien(CPURISCVState *env)  in cpu_get_fcfien()
96 bool cpu_get_bcfien(CPURISCVState *env)  in cpu_get_bcfien()
125 bool riscv_env_smode_dbltrp_enabled(CPURISCVState *env, bool virt)  in riscv_env_smode_dbltrp_enabled()
138 RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env)  in riscv_pm_get_pmm()
184 RISCVPmPmm riscv_pm_get_virt_pmm(CPURISCVState *env)  in riscv_pm_get_virt_pmm()
203 bool riscv_cpu_virt_mem_enabled(CPURISCVState *env)  in riscv_cpu_virt_mem_enabled()
382 static int riscv_cpu_pending_to_irq(CPURISCVState *env,  in riscv_cpu_pending_to_irq()
426 uint64_t riscv_cpu_all_pending(CPURISCVState *env)  in riscv_cpu_all_pending()
435 int riscv_cpu_mirq_pending(CPURISCVState *env)  in riscv_cpu_mirq_pending()
444 int riscv_cpu_sirq_pending(CPURISCVState *env)  in riscv_cpu_sirq_pending()
454 int riscv_cpu_vsirq_pending(CPURISCVState *env)  in riscv_cpu_vsirq_pending()
469 static int riscv_cpu_local_irq_pending(CPURISCVState *env)  in riscv_cpu_local_irq_pending()
553         CPURISCVState *env = &cpu->env;  in riscv_cpu_exec_interrupt()
565 bool riscv_cpu_fp_enabled(CPURISCVState *env)  in riscv_cpu_fp_enabled()
578 bool riscv_cpu_vector_enabled(CPURISCVState *env)  in riscv_cpu_vector_enabled()
590 void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env)  in riscv_cpu_swap_hypervisor_regs()
665 target_ulong riscv_cpu_get_geilen(CPURISCVState *env)  in riscv_cpu_get_geilen()
674 void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen)  in riscv_cpu_set_geilen()
689     CPURISCVState *env = &cpu->env;  in riscv_cpu_set_rnmi()
713     CPURISCVState *env = &cpu->env;  in riscv_cpu_claim_interrupts()
722 void riscv_cpu_interrupt(CPURISCVState *env)  in riscv_cpu_interrupt()
746 uint64_t riscv_cpu_update_mip(CPURISCVState *env, uint64_t mask, uint64_t value)  in riscv_cpu_update_mip()
762 void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(void *),  in riscv_cpu_set_rdtime_fn()
769 void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, uint32_t priv,  in riscv_cpu_set_aia_ireg_rmw_fn()
783 static void riscv_ctr_freeze(CPURISCVState *env, uint64_t freeze_mask,  in riscv_ctr_freeze()
795 void riscv_ctr_clear(CPURISCVState *env)  in riscv_ctr_clear()
822 static uint64_t riscv_ctr_get_control(CPURISCVState *env, target_long priv,  in riscv_ctr_get_control()
844 static bool riscv_ctr_check_xte(CPURISCVState *env, target_long src_prv,  in riscv_ctr_check_xte()
932 void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long dst,  in riscv_ctr_add_entry()
1031 void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv, bool virt_en)  in riscv_cpu_set_mode()
1092 static int get_physical_address_pmp(CPURISCVState *env, int *prot, hwaddr addr,  in get_physical_address_pmp()
1117 static bool do_svukte_check(CPURISCVState *env, bool first_stage,  in do_svukte_check()
1157 static bool check_svukte_addr(CPURISCVState *env, vaddr addr)  in check_svukte_addr()
1187 static int get_physical_address(CPURISCVState *env, hwaddr *physical,  in get_physical_address()
1616 static void raise_mmu_exception(CPURISCVState *env, target_ulong address,  in raise_mmu_exception()
1662     CPURISCVState *env = &cpu->env;  in riscv_cpu_get_phys_page_debug()
1689     CPURISCVState *env = &cpu->env;  in riscv_cpu_do_transaction_failed()
1710     CPURISCVState *env = &cpu->env;  in riscv_cpu_do_unaligned_access()
1765     CPURISCVState *env = &cpu->env;  in riscv_cpu_tlb_fill()
1907 static target_ulong riscv_transformed_insn(CPURISCVState *env,  in riscv_transformed_insn()
2129 static void riscv_do_nmi(CPURISCVState *env, target_ulong cause, bool virt)  in riscv_do_nmi()
2155     CPURISCVState *env = &cpu->env;  in riscv_cpu_do_interrupt()