83                               env->spr[SPR_40x_PID], i)) {  in mmu40x_get_physical_address()
87         zpr = (env->spr[SPR_40x_ZPR] >> (30 - (2 * zsel))) & 0x3;  in mmu40x_get_physical_address()
107                 env->spr[SPR_40x_ESR] = 1 << 22;  in mmu40x_get_physical_address()
120                 env->spr[SPR_40x_ESR] = 0;  in mmu40x_get_physical_address()
137     if (ppcemb_tlb_check(env, tlb, raddr, addr, env->spr[SPR_BOOKE_PID], i)) {  in mmubooke_check_pid()
146     if (env->spr[SPR_BOOKE_PID1] &&  in mmubooke_check_pid()
147         ppcemb_tlb_check(env, tlb, raddr, addr, env->spr[SPR_BOOKE_PID1], i)) {  in mmubooke_check_pid()
150     if (env->spr[SPR_BOOKE_PID2] &&  in mmubooke_check_pid()
151         ppcemb_tlb_check(env, tlb, raddr, addr, env->spr[SPR_BOOKE_PID2], i)) {  in mmubooke_check_pid()
293             epidr = env->spr[SPR_BOOKE_EPSC];  in mmubooke206_get_as()
295             epidr = env->spr[SPR_BOOKE_EPLC];  in mmubooke206_get_as()
320                              env->spr[SPR_BOOKE_PID]) >= 0) {  in mmubooke206_check_tlb()
324         if (env->spr[SPR_BOOKE_PID1] &&  in mmubooke206_check_tlb()
326                              env->spr[SPR_BOOKE_PID1]) >= 0) {  in mmubooke206_check_tlb()
330         if (env->spr[SPR_BOOKE_PID2] &&  in mmubooke206_check_tlb()
332                              env->spr[SPR_BOOKE_PID2]) >= 0) {  in mmubooke206_check_tlb()
433     env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK;  in booke206_update_mas_tlb_miss()
434     env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK;  in booke206_update_mas_tlb_miss()
435     env->spr[SPR_BOOKE_MAS2] = env->spr[SPR_BOOKE_MAS4] & MAS4_WIMGED_MASK;  in booke206_update_mas_tlb_miss()
436     env->spr[SPR_BOOKE_MAS3] = 0;  in booke206_update_mas_tlb_miss()
437     env->spr[SPR_BOOKE_MAS6] = 0;  in booke206_update_mas_tlb_miss()
438     env->spr[SPR_BOOKE_MAS7] = 0;  in booke206_update_mas_tlb_miss()
442         env->spr[SPR_BOOKE_MAS1] |= MAS1_TS;  in booke206_update_mas_tlb_miss()
443         env->spr[SPR_BOOKE_MAS6] |= MAS6_SAS;  in booke206_update_mas_tlb_miss()
446     env->spr[SPR_BOOKE_MAS1] |= MAS1_VALID;  in booke206_update_mas_tlb_miss()
447     env->spr[SPR_BOOKE_MAS2] |= address & MAS2_EPN_MASK;  in booke206_update_mas_tlb_miss()
450         switch (env->spr[SPR_BOOKE_MAS4] & MAS4_TIDSELD_PIDZ) {  in booke206_update_mas_tlb_miss()
452             missed_tid = env->spr[SPR_BOOKE_PID];  in booke206_update_mas_tlb_miss()
455             missed_tid = env->spr[SPR_BOOKE_PID1];  in booke206_update_mas_tlb_miss()
458             missed_tid = env->spr[SPR_BOOKE_PID2];  in booke206_update_mas_tlb_miss()
461         env->spr[SPR_BOOKE_MAS6] |= env->spr[SPR_BOOKE_PID] << 16;  in booke206_update_mas_tlb_miss()
464         env->spr[SPR_BOOKE_MAS6] |= missed_tid << 16;  in booke206_update_mas_tlb_miss()
466     env->spr[SPR_BOOKE_MAS1] |= (missed_tid << MAS1_TID_SHIFT);  in booke206_update_mas_tlb_miss()
470     env->spr[SPR_BOOKE_MAS0] |= env->last_way << MAS0_ESEL_SHIFT;  in booke206_update_mas_tlb_miss()
473     env->spr[SPR_BOOKE_MAS0] |= env->last_way << MAS0_NV_SHIFT;  in booke206_update_mas_tlb_miss()
511         env->spr[SPR_BOOKE_DEAR] = eaddr;  in ppc_booke_xlate()
512         env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);  in ppc_booke_xlate()
519             env->spr[SPR_BOOKE_DEAR] = eaddr;  in ppc_booke_xlate()
520             env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);  in ppc_booke_xlate()
526         env->spr[SPR_BOOKE_ESR] = 0;  in ppc_booke_xlate()