Lines Matching refs:float32
38 static inline float32 bfp32_neg(float32 a) in bfp32_neg()
133 static inline int ppc_float32_get_unbiased_exp(float32 f) in ppc_float32_get_unbiased_exp()
167 COMPUTE_FPRF(float32) in COMPUTE_FPRF() argument
580 float32 tmp = cvtr(arg, &env->fp_status); \
691 float32 f32 = float64_to_float32(arg, &env->fp_status); in FPU_FMADD()
1012 float32 tmp; in efscfsf()
1024 float32 tmp; in efscfuf()
1036 float32 tmp; in efsctsf()
1052 float32 tmp; in efsctuf()
1603 VSX_ADD_SUB(XVADDSP, add, 4, float32, VsrW(i), 0, 0)
1607 VSX_ADD_SUB(XVSUBSP, sub, 4, float32, VsrW(i), 0, 0)
1680 VSX_MUL(XVMULSP, 4, float32, VsrW(i), 0, 0)
1754 VSX_DIV(XVDIVSP, 4, float32, VsrW(i), 0, 0)
1822 VSX_RE(xvresp, 4, float32, VsrW(i), 0, 0)
1867 VSX_SQRT(xvsqrtsp, 4, float32, VsrW(i), 0, 0)
1911 VSX_RSQRTE(xvrsqrtesp, 4, float32, VsrW(i), 0, 0)
1968 VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
2021 VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23)
2075 VSX_MADD(xvmaddsp, 4, float32, VsrW(i), MADD_FLGS, 0)
2076 VSX_MADD(xvmsubsp, 4, float32, VsrW(i), MSUB_FLGS, 0)
2077 VSX_MADD(xvnmaddsp, 4, float32, VsrW(i), NMADD_FLGS, 0)
2078 VSX_MADD(xvnmsubsp, 4, float32, VsrW(i), NMSUB_FLGS, 0)
2386 VSX_MAX_MIN(XVMAXSP, maxnum, 4, float32, VsrW(i))
2389 VSX_MAX_MIN(XVMINSP, minnum, 4, float32, VsrW(i))
2532 VSX_CMP(XVCMPEQSP, 4, float32, VsrW(i), eq, 0, 1)
2533 VSX_CMP(XVCMPGESP, 4, float32, VsrW(i), le, 1, 1)
2534 VSX_CMP(XVCMPGTSP, 4, float32, VsrW(i), lt, 1, 1)
2535 VSX_CMP(XVCMPNESP, 4, float32, VsrW(i), eq, 0, 0)
2571 VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, VsrW(0), VsrD(0), 1)
2572 VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, VsrW(2 * i), VsrD(i), 0)
2599 VSX_CVT_FP_TO_FP2(xvcvdpsp, 2, float64, float32, 0)
2600 VSX_CVT_FP_TO_FP2(xscvdpsp, 1, float64, float32, 1)
2676 VSX_CVT_FP_TO_FP_HP(xvcvsphp, 4, float32, float16, VsrW(i), VsrH(2 * i + 1), 0)
2677 VSX_CVT_FP_TO_FP_HP(xvcvhpsp, 4, float16, float32, VsrH(2 * i + 1), VsrW(i), 0)
2810 VSX_CVT_FP_TO_INT(xvcvspsxds, 2, float32, int64, VsrW(2 * i), VsrD(i), false, \
2812 VSX_CVT_FP_TO_INT(xvcvspsxws, 4, float32, int32, VsrW(i), VsrW(i), false, \
2814 VSX_CVT_FP_TO_INT(xvcvspuxds, 2, float32, uint64, VsrW(2 * i), VsrD(i), \
2816 VSX_CVT_FP_TO_INT(xvcvspuxws, 4, float32, uint32, VsrW(i), VsrW(i), false, 0U)
2954 VSX_CVT_INT_TO_FP(xvcvsxwsp, 4, int32, float32, VsrW(i), VsrW(i), 0, 0)
2955 VSX_CVT_INT_TO_FP(xvcvuxwsp, 4, uint32, float32, VsrW(i), VsrW(i), 0, 0)
2972 VSX_CVT_INT_TO_FP2(xvcvsxdsp, int64, float32)
2973 VSX_CVT_INT_TO_FP2(xvcvuxdsp, uint64, float32)
3081 VSX_ROUND(xvrspi, 4, float32, VsrW(i), float_round_ties_away, 0)
3082 VSX_ROUND(xvrspic, 4, float32, VsrW(i), FLOAT_ROUND_CURRENT, 0)
3083 VSX_ROUND(xvrspim, 4, float32, VsrW(i), float_round_down, 0)
3084 VSX_ROUND(xvrspip, 4, float32, VsrW(i), float_round_up, 0)
3085 VSX_ROUND(xvrspiz, 4, float32, VsrW(i), float_round_to_zero, 0)
3132 VSX_TSTDC(float32)
3393 float32 r, aux_acc; in vsxger16()