58  *    D - two operations in parallel       16 - half word
506  * MXU pool 16
680     Rb = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32i2m()
685     } else if (XRa == 16) {  in gen_mxu_s32i2m()
701     Rb = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32m2i()
705     } else if (XRa == 16) {  in gen_mxu_s32m2i()
750     /* XRa[23:16] = tmp8 */  in gen_mxu_s8ldd()
754         tcg_gen_deposit_tl(t0, t0, t1, 16, 8);  in gen_mxu_s8ldd()
765         tcg_gen_deposit_tl(t0, t1, t1, 16, 16);  in gen_mxu_s8ldd()
771         tcg_gen_deposit_tl(t0, t1, t1, 16, 16);  in gen_mxu_s8ldd()
778         tcg_gen_shli_tl(t1, t1, 16);  in gen_mxu_s8ldd()
785         tcg_gen_deposit_tl(t0, t1, t1, 16, 16);  in gen_mxu_s8ldd()
832     /* XRa[23:16] => tmp8 */  in gen_mxu_s8std()
834         tcg_gen_extract_tl(t1, t1, 16, 8);  in gen_mxu_s8std()
876         tcg_gen_deposit_tl(t0, t0, t1, 0, 16);  in gen_mxu_s16ldd()
878     /* XRa[31:16] = tmp16 */  in gen_mxu_s16ldd()
882         tcg_gen_deposit_tl(t0, t0, t1, 16, 16);  in gen_mxu_s16ldd()
891         tcg_gen_deposit_tl(t0, t1, t1,  0, 16);  in gen_mxu_s16ldd()
892         tcg_gen_deposit_tl(t0, t1, t1, 16, 16);  in gen_mxu_s16ldd()
934         tcg_gen_extract_tl(t1, t1, 0, 16);  in gen_mxu_s16std()
936     /* XRa[31:16] => tmp16 */  in gen_mxu_s16std()
938         tcg_gen_extract_tl(t1, t1, 16, 16);  in gen_mxu_s16std()
964     rs  = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32mul()
987  * D16MUL  XRa, XRb, XRc, XRd, optn2 - Signed 16 bit pattern multiplication
1017     tcg_gen_sextract_tl(t0, t1, 0, 16);  in gen_mxu_d16mul()
1018     tcg_gen_sextract_tl(t1, t1, 16, 16);  in gen_mxu_d16mul()
1020     tcg_gen_sextract_tl(t2, t3, 0, 16);  in gen_mxu_d16mul()
1021     tcg_gen_sextract_tl(t3, t3, 16, 16);  in gen_mxu_d16mul()
1083         tcg_gen_shri_tl(t2, t2, 16);  in gen_mxu_d16mul()
1091  *   Signed 16 bit pattern multiply and accumulate
1116     tcg_gen_sextract_tl(t0, t1, 0, 16);  in gen_mxu_d16mac()
1117     tcg_gen_sextract_tl(t1, t1, 16, 16);  in gen_mxu_d16mac()
1120     tcg_gen_sextract_tl(t2, t3, 0, 16);  in gen_mxu_d16mac()
1121     tcg_gen_sextract_tl(t3, t3, 16, 16);  in gen_mxu_d16mac()
1209         tcg_gen_shri_tl(t2, t2, 16);  in gen_mxu_d16mac()
1217  * unsigned 16 bit pattern multiply and add/subtract.
1237     tcg_gen_sextract_tl(t0, t1,  0, 16);  in gen_mxu_d16madl()
1238     tcg_gen_sextract_tl(t1, t1, 16, 16);  in gen_mxu_d16madl()
1241     tcg_gen_sextract_tl(t2, t3,  0, 16);  in gen_mxu_d16madl()
1242     tcg_gen_sextract_tl(t3, t3, 16, 16);  in gen_mxu_d16madl()
1262     tcg_gen_extract_tl(t2, t2, 0, 16);  in gen_mxu_d16madl()
1263     tcg_gen_extract_tl(t3, t3, 0, 16);  in gen_mxu_d16madl()
1266     tcg_gen_extract_tl(t0, t1,  0, 16);  in gen_mxu_d16madl()
1267     tcg_gen_extract_tl(t1, t1, 16, 16);  in gen_mxu_d16madl()
1289     tcg_gen_shli_tl(t3, t3, 16);  in gen_mxu_d16madl()
1295  * signed 16 bit pattern multiply and 32-bit add/subtract.
1322         tcg_gen_sextract_tl(t0, t0, 16, 16);  in gen_mxu_s16mad()
1323         tcg_gen_sextract_tl(t1, t1, 16, 16);  in gen_mxu_s16mad()
1326         tcg_gen_sextract_tl(t0, t0,  0, 16);  in gen_mxu_s16mad()
1327         tcg_gen_sextract_tl(t1, t1,  0, 16);  in gen_mxu_s16mad()
1330         tcg_gen_sextract_tl(t0, t0, 16, 16);  in gen_mxu_s16mad()
1331         tcg_gen_sextract_tl(t1, t1,  0, 16);  in gen_mxu_s16mad()
1334         tcg_gen_sextract_tl(t0, t0,  0, 16);  in gen_mxu_s16mad()
1335         tcg_gen_sextract_tl(t1, t1, 16, 16);  in gen_mxu_s16mad()
1389         tcg_gen_sextract_tl(t2, t3, 16, 8);  in gen_mxu_q8mul_mac()
1395         tcg_gen_extract_tl(t2, t3, 16, 8);  in gen_mxu_q8mul_mac()
1401     tcg_gen_extract_tl(t6, t7, 16, 8);  in gen_mxu_q8mul_mac()
1412         tcg_gen_extract_tl(t6, t4,  0, 16);  in gen_mxu_q8mul_mac()
1413         tcg_gen_extract_tl(t7, t4, 16, 16);  in gen_mxu_q8mul_mac()
1421         tcg_gen_extract_tl(t6, t5,  0, 16);  in gen_mxu_q8mul_mac()
1422         tcg_gen_extract_tl(t7, t5, 16, 16);  in gen_mxu_q8mul_mac()
1432     tcg_gen_deposit_tl(t0, t0, t1, 16, 16);  in gen_mxu_q8mul_mac()
1433     tcg_gen_deposit_tl(t1, t2, t3, 16, 16);  in gen_mxu_q8mul_mac()
1469     tcg_gen_extract_tl(t2, t3, 16, 8);  in gen_mxu_q8madl()
1474     tcg_gen_extract_tl(t6, t7, 16, 8);  in gen_mxu_q8madl()
1492     tcg_gen_extract_tl(t6, t4, 16, 8);  in gen_mxu_q8madl()
1504     tcg_gen_deposit_tl(t5, t5, t2, 16, 8);  in gen_mxu_q8madl()
1599     Rc = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32ldxvx()
1637     Rc = extract32(ctx->opcode, 16, 5);  in gen_mxu_lxx()
1668     Rc = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32stxvx()
1931  *    to SFT4 bits (0..15). Pack 16 LSBs of each into XRa.
1935  *    to rb[3:0] bits. Pack 16 LSBs of each into XRa.
1964         tcg_gen_extract_tl(t2, t1, 0, 16);  in gen_mxu_d32sarl()
1965         tcg_gen_deposit_tl(t2, t2, t0, 16, 16);  in gen_mxu_d32sarl()
1972  *    Quad 16-bit shift left from XRb and XRc to SFT4
1975  *    Quad 16-bit shift logic right from XRb and XRc
1978  *    Quad 16-bit shift arithmetic right from XRb and XRc
2000         tcg_gen_sextract_tl(t1, t0, 16, 16);  in gen_mxu_q16sxx()
2001         tcg_gen_sextract_tl(t0, t0,  0, 16);  in gen_mxu_q16sxx()
2002         tcg_gen_sextract_tl(t3, t2, 16, 16);  in gen_mxu_q16sxx()
2003         tcg_gen_sextract_tl(t2, t2,  0, 16);  in gen_mxu_q16sxx()
2005         tcg_gen_extract_tl(t1, t0, 16, 16);  in gen_mxu_q16sxx()
2006         tcg_gen_extract_tl(t0, t0,  0, 16);  in gen_mxu_q16sxx()
2007         tcg_gen_extract_tl(t3, t2, 16, 16);  in gen_mxu_q16sxx()
2008         tcg_gen_extract_tl(t2, t2,  0, 16);  in gen_mxu_q16sxx()
2029     tcg_gen_deposit_tl(t0, t0, t1, 16, 16);  in gen_mxu_q16sxx()
2030     tcg_gen_deposit_tl(t2, t2, t3, 16, 16);  in gen_mxu_q16sxx()
2038  *    Quad 16-bit shift left from XRa and XRd to rs[3:0]
2041  *    Quad 16-bit shift logic right from XRa and XRd to rs[3:0]
2044  *    Quad 16-bit shift arithmetic right from XRa and XRd to rs[3:0]
2068         tcg_gen_sextract_tl(t1, t0, 16, 16);  in gen_mxu_q16sxxv()
2069         tcg_gen_sextract_tl(t0, t0,  0, 16);  in gen_mxu_q16sxxv()
2070         tcg_gen_sextract_tl(t3, t2, 16, 16);  in gen_mxu_q16sxxv()
2071         tcg_gen_sextract_tl(t2, t2,  0, 16);  in gen_mxu_q16sxxv()
2073         tcg_gen_extract_tl(t1, t0, 16, 16);  in gen_mxu_q16sxxv()
2074         tcg_gen_extract_tl(t0, t0,  0, 16);  in gen_mxu_q16sxxv()
2075         tcg_gen_extract_tl(t3, t2, 16, 16);  in gen_mxu_q16sxxv()
2076         tcg_gen_extract_tl(t2, t2,  0, 16);  in gen_mxu_q16sxxv()
2097     tcg_gen_deposit_tl(t0, t0, t1, 16, 16);  in gen_mxu_q16sxxv()
2098     tcg_gen_deposit_tl(t2, t2, t3, 16, 16);  in gen_mxu_q16sxxv()
2170  *    Update XRa with the 16-bit-wise maximums of signed integers
2174  *    Update XRa with the 16-bit-wise minimums of signed integers
2213         tcg_gen_shli_i32(t0, t0, 16);  in gen_mxu_D16MAX_D16MIN()
2221         tcg_gen_shri_i32(t0, t0, 16);  in gen_mxu_D16MAX_D16MIN()
2246         tcg_gen_shli_i32(t0, t0, 16);  in gen_mxu_D16MAX_D16MIN()
2247         tcg_gen_shli_i32(t1, t1, 16);  in gen_mxu_D16MAX_D16MIN()
2255         tcg_gen_shri_i32(t0, t0, 16);  in gen_mxu_D16MAX_D16MIN()
2491         tcg_gen_sextract_tl(t0, t3, 16, 16);  in gen_mxu_D16SLT()
2492         tcg_gen_sextract_tl(t1, t4, 16, 16);  in gen_mxu_D16SLT()
2494         tcg_gen_shli_tl(t2, t0, 16);  in gen_mxu_D16SLT()
2495         tcg_gen_sextract_tl(t0, t3,  0, 16);  in gen_mxu_D16SLT()
2496         tcg_gen_sextract_tl(t1, t4,  0, 16);  in gen_mxu_D16SLT()
2542         tcg_gen_sextract_tl(t0, t3, 16, 16);  in gen_mxu_d16avg()
2543         tcg_gen_sextract_tl(t1, t4, 16, 16);  in gen_mxu_d16avg()
2550         tcg_gen_sextract_tl(t0, t3,  0, 16);  in gen_mxu_d16avg()
2551         tcg_gen_sextract_tl(t1, t4,  0, 16);  in gen_mxu_d16avg()
2557         tcg_gen_deposit_tl(t2, t2, t0, 0, 16);  in gen_mxu_d16avg()
2658     tcg_gen_extract_tl(t3, t1, 16, 8);  in gen_mxu_q8movzn()
2660     tcg_gen_extract_tl(t3, t0, 16, 8);  in gen_mxu_q8movzn()
2661     tcg_gen_deposit_tl(t2, t2, t3, 16, 8);  in gen_mxu_q8movzn()
2681  *    Double 16-bit packed conditional move where
2687  *    Double 16-bit packed conditional move where
2711     tcg_gen_extract_tl(t3, t1, 16, 16);  in gen_mxu_d16movzn()
2713     tcg_gen_extract_tl(t3, t0, 16, 16);  in gen_mxu_d16movzn()
2714     tcg_gen_deposit_tl(t2, t2, t3, 16, 16);  in gen_mxu_d16movzn()
2717     tcg_gen_extract_tl(t3, t1, 0, 16);  in gen_mxu_d16movzn()
2719     tcg_gen_extract_tl(t3, t0, 0, 16);  in gen_mxu_d16movzn()
2720     tcg_gen_deposit_tl(t2, t2, t3, 0, 16);  in gen_mxu_d16movzn()
2839         tcg_gen_sextract_tl(t0, mxu_gpr[XRc - 1], 16, 16);  in gen_mxu_D16CPS()
2840         tcg_gen_sextract_tl(t1, mxu_gpr[XRb - 1], 16, 16);  in gen_mxu_D16CPS()
2845         tcg_gen_shli_i32(t1, t1, 16);  in gen_mxu_D16CPS()
2847         tcg_gen_sextract_tl(t0, mxu_gpr[XRc - 1],  0, 16);  in gen_mxu_D16CPS()
2849         tcg_gen_sextract_tl(t0, mxu_gpr[XRb - 1],  0, 16);  in gen_mxu_D16CPS()
2854         tcg_gen_extract_tl(t0, mxu_gpr[XRb - 1],  0, 16);  in gen_mxu_D16CPS()
2857         tcg_gen_deposit_tl(mxu_gpr[XRa - 1], t1, t0, 0, 16);  in gen_mxu_D16CPS()
2978  *    to 16-bit and put results as packed 16-bit data
2985  *    to 16-bit and accumulate results as packed 16-bit data
3017             gen_extract_mxu_gpr(t0, XRb, 16, 8);  in gen_mxu_q8adde()
3018             gen_extract_mxu_gpr(t1, XRc, 16, 8);  in gen_mxu_q8adde()
3030                 tcg_gen_extract_tl(t1, t5,  0, 16);  in gen_mxu_q8adde()
3031                 tcg_gen_extract_tl(t3, t5, 16, 16);  in gen_mxu_q8adde()
3035             tcg_gen_shli_tl(t2, t2, 16);  in gen_mxu_q8adde()
3036             tcg_gen_extract_tl(t0, t0, 0, 16);  in gen_mxu_q8adde()
3053                 tcg_gen_extract_tl(t1, t5,  0, 16);  in gen_mxu_q8adde()
3054                 tcg_gen_extract_tl(t3, t5, 16, 16);  in gen_mxu_q8adde()
3058             tcg_gen_shli_tl(t2, t2, 16);  in gen_mxu_q8adde()
3059             tcg_gen_extract_tl(t0, t0, 0, 16);  in gen_mxu_q8adde()
3071  *    with zero extending to 16-bit data.
3074  *    with zero extending to 16-bit data and adding 2 to each
3106             tcg_gen_extract_tl(t2, mxu_gpr[XRb - 1], 16, 8);  in gen_mxu_d8sum()
3117             tcg_gen_extract_tl(t2, mxu_gpr[XRc - 1], 16, 8);  in gen_mxu_d8sum()
3130         tcg_gen_shli_tl(t4, t4, 16);  in gen_mxu_d8sum()
3138  * 16-bit pattern addition.
3159     tcg_gen_extract_tl(t0, t1,  0, 16);  in gen_mxu_q16add()
3160     tcg_gen_extract_tl(t1, t1, 16, 16);  in gen_mxu_q16add()
3163     tcg_gen_extract_tl(t2, t3,  0, 16);  in gen_mxu_q16add()
3164     tcg_gen_extract_tl(t3, t3, 16, 16);  in gen_mxu_q16add()
3212     tcg_gen_shli_tl(t0, t0, 16);  in gen_mxu_q16add()
3213     tcg_gen_extract_tl(t1, t1, 0, 16);  in gen_mxu_q16add()
3214     tcg_gen_shli_tl(t4, t4, 16);  in gen_mxu_q16add()
3215     tcg_gen_extract_tl(t5, t5, 0, 16);  in gen_mxu_q16add()
3223  * 16-bit addition/subtraction with accumulate.
3245     tcg_gen_extract_tl(t0, t1,  0, 16);  in gen_mxu_q16acc()
3246     tcg_gen_extract_tl(t1, t1, 16, 16);  in gen_mxu_q16acc()
3249     tcg_gen_extract_tl(t2, t3,  0, 16);  in gen_mxu_q16acc()
3250     tcg_gen_extract_tl(t3, t3, 16, 16);  in gen_mxu_q16acc()
3281         tcg_gen_extract_tl(t0, t0, 0, 16);  in gen_mxu_q16acc()
3282         tcg_gen_extract_tl(t1, mxu_gpr[XRa - 1], 16, 16);  in gen_mxu_q16acc()
3284         tcg_gen_shli_tl(t1, t1, 16);  in gen_mxu_q16acc()
3290         tcg_gen_extract_tl(t0, t0, 0, 16);  in gen_mxu_q16acc()
3291         tcg_gen_extract_tl(t1, mxu_gpr[XRd - 1], 16, 16);  in gen_mxu_q16acc()
3293         tcg_gen_shli_tl(t1, t1, 16);  in gen_mxu_q16acc()
3300  * 16-bit accumulate.
3324         tcg_gen_extract_tl(t0, t2,  0, 16);  in gen_mxu_q16accm()
3325         tcg_gen_extract_tl(t1, t2, 16, 16);  in gen_mxu_q16accm()
3328         tcg_gen_extract_tl(a0, a1,  0, 16);  in gen_mxu_q16accm()
3329         tcg_gen_extract_tl(a1, a1, 16, 16);  in gen_mxu_q16accm()
3338         tcg_gen_extract_tl(a0, a0, 0, 16);  in gen_mxu_q16accm()
3339         tcg_gen_shli_tl(a1, a1, 16);  in gen_mxu_q16accm()
3347         tcg_gen_extract_tl(t0, t3,  0, 16);  in gen_mxu_q16accm()
3348         tcg_gen_extract_tl(t1, t3, 16, 16);  in gen_mxu_q16accm()
3351         tcg_gen_extract_tl(a0, a1,  0, 16);  in gen_mxu_q16accm()
3352         tcg_gen_extract_tl(a1, a1, 16, 16);  in gen_mxu_q16accm()
3361         tcg_gen_extract_tl(a0, a0, 0, 16);  in gen_mxu_q16accm()
3362         tcg_gen_shli_tl(a1, a1, 16);  in gen_mxu_q16accm()
3370  * 16-bit sign extended addition and accumulate.
3391         tcg_gen_sextract_tl(t0, t2,  0, 16);  in gen_mxu_d16asum()
3392         tcg_gen_sextract_tl(t1, t2, 16, 16);  in gen_mxu_d16asum()
3402         tcg_gen_sextract_tl(t0, t3,  0, 16);  in gen_mxu_d16asum()
3403         tcg_gen_sextract_tl(t1, t3, 16, 16);  in gen_mxu_d16asum()
3651     bits5 = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32extr()
3706     rt  = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32extrv()
3775             tcg_gen_movi_tl(t0, s8 << 16);  in gen_mxu_s32lui()
3781             tcg_gen_movi_tl(t0, (s8 << 16) | s8);  in gen_mxu_s32lui()
3788             tcg_gen_movi_tl(t0, (s16 << 16) | s16);  in gen_mxu_s32lui()
3791             tcg_gen_movi_tl(t0, (s8 << 24) | (s8 << 16) | (s8 << 8) | s8);  in gen_mxu_s32lui()
3800  *  Packs four 16-bit signed integers in XRb and XRc to
3832             tcg_gen_sari_tl(t0, mxu_gpr[XRb - 1], 16);  in gen_mxu_Q16SAT()
3843             tcg_gen_shli_tl(t1, mxu_gpr[XRb - 1], 16);  in gen_mxu_Q16SAT()
3844             tcg_gen_sari_tl(t1, t1, 16);  in gen_mxu_Q16SAT()
3856             tcg_gen_shli_tl(t1, t1, 16);  in gen_mxu_Q16SAT()
3868             tcg_gen_sari_tl(t0, mxu_gpr[XRc - 1], 16);  in gen_mxu_Q16SAT()
3879             tcg_gen_shli_tl(t1, mxu_gpr[XRc - 1], 16);  in gen_mxu_Q16SAT()
3880             tcg_gen_sari_tl(t1, t1, 16);  in gen_mxu_Q16SAT()
3901  *    Determine sign of quad packed 16-bit signed values
3933     tcg_gen_sextract_tl(t2, t0, 16, 16);  in gen_mxu_q16scop()
3945     tcg_gen_sextract_tl(t2, t0, 0, 16);  in gen_mxu_q16scop()
3955     tcg_gen_sextract_tl(t2, t1, 16, 16);  in gen_mxu_q16scop()
3967     tcg_gen_sextract_tl(t2, t1, 0, 16);  in gen_mxu_q16scop()
4010         tcg_gen_deposit_tl(t3, t3, t1, 16, 8);  in gen_mxu_s32sfl()
4016         tcg_gen_deposit_tl(t2, t2, t1, 16, 8);  in gen_mxu_s32sfl()
4021         tcg_gen_deposit_tl(t3, t3, t0, 16, 8);  in gen_mxu_s32sfl()
4024         tcg_gen_deposit_tl(t2, t2, t0, 16, 8);  in gen_mxu_s32sfl()
4037         tcg_gen_shri_tl(t0, t0, 16);  in gen_mxu_s32sfl()
4041         tcg_gen_shri_tl(t1, t1, 16);  in gen_mxu_s32sfl()
4042         tcg_gen_deposit_tl(t2, t2, t1, 16, 8);  in gen_mxu_s32sfl()
4047         tcg_gen_shri_tl(t1, t1, 16);  in gen_mxu_s32sfl()
4048         tcg_gen_deposit_tl(t2, t2, t1,  0, 16);  in gen_mxu_s32sfl()
4049         tcg_gen_deposit_tl(t3, t3, t0, 16, 16);  in gen_mxu_s32sfl()
4226                 tcg_gen_shli_i32(t0, t0, 16);  in gen_mxu_S32ALNI()
4229                 tcg_gen_shri_i32(t1, t1, 16);  in gen_mxu_S32ALNI()
4354     Rb   = extract32(ctx->opcode, 16, 5);  in gen_mxu_s32madd_sub()