Lines Matching full:1
34 uint32_t uw[1];
35 int32_t sw[1];
45 uint64_t ul[1];
46 int64_t sl[1];
62 env->active_tc.DSPControl &= ~(1 << 13); in set_DSPControl_carryflag()
75 filter = ((0x01 << len) - 1) << 24; in set_DSPControl_24()
124 set_DSPControl_overflow_flag(1, 20, env); \
143 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_add_i16()
162 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat_add_i16()
181 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat_add_i32()
194 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_add_u8()
208 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_add_u16()
225 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat_add_u8()
242 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat_add_u16()
274 set_DSPControl_overflow_flag(1, 16 + acc, env); in mipsdsp_sat32_acc_q31()
281 /* a[0] is LO, a[1] is HI. */
290 ret[1] = env->active_tc.HI[ac] + a[1]; in mipsdsp_sat64_acc_add_q63()
294 ret[1] += 1; in mipsdsp_sat64_acc_add_q63()
296 temp64 = ret[1] & 1; in mipsdsp_sat64_acc_add_q63()
300 ret[1] = ~0ull; in mipsdsp_sat64_acc_add_q63()
302 ret[0] = (0x01ull << 63) - 1; in mipsdsp_sat64_acc_add_q63()
303 ret[1] = 0x00; in mipsdsp_sat64_acc_add_q63()
305 set_DSPControl_overflow_flag(1, 16 + ac, env); in mipsdsp_sat64_acc_add_q63()
317 ret[1] = env->active_tc.HI[ac] - a[1]; in mipsdsp_sat64_acc_sub_q63()
320 ret[1] -= 1; in mipsdsp_sat64_acc_sub_q63()
322 temp64 = ret[1] & 1; in mipsdsp_sat64_acc_sub_q63()
326 ret[1] = ~0ull; in mipsdsp_sat64_acc_sub_q63()
328 ret[0] = (0x01ull << 63) - 1; in mipsdsp_sat64_acc_sub_q63()
329 ret[1] = 0x00; in mipsdsp_sat64_acc_sub_q63()
331 set_DSPControl_overflow_flag(1, 16 + ac, env); in mipsdsp_sat64_acc_sub_q63()
344 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_mul_i16_i16()
372 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_sat16_mul_i16_i16()
375 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_sat16_mul_i16_i16()
389 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_mul_q15_q15_overflowflag21()
391 temp = ((int16_t)a * (int16_t)b) << 1; in mipsdsp_mul_q15_q15_overflowflag21()
431 return (temp >> 1) & 0xFFFF; in mipsdsp_rshift1_add_q16()
440 temp += 1; in mipsdsp_rrshift1_add_q16()
442 return (temp >> 1) & 0xFFFF; in mipsdsp_rrshift1_add_q16()
451 return (temp >> 1) & 0xFFFFFFFF; in mipsdsp_rshift1_add_q32()
459 temp += 1; in mipsdsp_rrshift1_add_q32()
461 return (temp >> 1) & 0xFFFFFFFF; in mipsdsp_rrshift1_add_q32()
470 return (temp >> 1) & 0x00FF; in mipsdsp_rshift1_add_u8()
477 temp = (uint16_t)a + (uint16_t)b + 1; in mipsdsp_rrshift1_add_u8()
479 return (temp >> 1) & 0x00FF; in mipsdsp_rrshift1_add_u8()
489 return (temp >> 1) & 0x00FF; in mipsdsp_rshift1_sub_u8()
496 temp = (uint16_t)a - (uint16_t)b + 1; in mipsdsp_rrshift1_sub_u8()
498 return (temp >> 1) & 0x00FF; in mipsdsp_rrshift1_sub_u8()
502 /* 128 bits long. p[0] is LO, p[1] is HI. */
512 p[0] = (shift == 0) ? (acc << 1) : (acc >> (shift - 1)); in mipsdsp_rndrashift_short_acc()
513 p[1] = (acc >> 63) & 0x01; in mipsdsp_rndrashift_short_acc()
517 /* 128 bits long. p[0] is LO, p[1] is HI */
530 p[1] = tempB; in mipsdsp_rashift_acc()
534 p[1] = (int64_t)tempB >> shift; in mipsdsp_rashift_acc()
538 /* 128 bits long. p[0] is LO, p[1] is HI , p[2] is sign of HI.*/
552 p[1] = (tempB << 1) | (tempA >> 63); in mipsdsp_rndrashift_acc()
553 p[0] = tempA << 1; in mipsdsp_rndrashift_acc()
555 p[0] = (tempB << (65 - shift)) | (tempA >> (shift - 1)); in mipsdsp_rndrashift_acc()
556 p[1] = (int64_t)tempB >> (shift - 1); in mipsdsp_rndrashift_acc()
573 set_DSPControl_overflow_flag(1, 16 + ac, env); in mipsdsp_mul_q15_q15()
575 temp = ((int16_t)a * (int16_t)b) << 1; in mipsdsp_mul_q15_q15()
587 temp = (0x01ull << 63) - 1; in mipsdsp_mul_q31_q31()
588 set_DSPControl_overflow_flag(1, 16 + ac, env); in mipsdsp_mul_q31_q31()
590 temp = ((int64_t)(int32_t)a * (int32_t)b) << 1; in mipsdsp_mul_q31_q31()
609 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_mul_u8_u16()
629 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_rndq15_mul_q15_q15()
631 temp = ((int16_t)a * (int16_t)b) << 1; in mipsdsp_rndq15_mul_q15_q15()
645 set_DSPControl_overflow_flag(1, 21, env); in mipsdsp_sat16_mul_q15_q15()
648 temp = temp << 1; in mipsdsp_sat16_mul_q15_q15()
667 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_trunc16_sat16_round()
686 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_sat8_reduce_precision()
692 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_sat8_reduce_precision()
705 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_lshift8()
720 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_lshift16()
735 discard = (int32_t)a >> (31 - (s - 1)); in mipsdsp_lshift32()
738 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_lshift32()
756 discard = (((0x01 << (16 - s)) - 1) << s) | in mipsdsp_sat16_lshift()
757 ((a >> (14 - (s - 1))) & ((0x01 << s) - 1)); in mipsdsp_sat16_lshift()
759 discard = a >> (14 - (s - 1)); in mipsdsp_sat16_lshift()
763 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_sat16_lshift()
782 discard = (((0x01 << (32 - s)) - 1) << s) | in mipsdsp_sat32_lshift()
783 ((a >> (30 - (s - 1))) & ((0x01 << s) - 1)); in mipsdsp_sat32_lshift()
785 discard = a >> (30 - (s - 1)); in mipsdsp_sat32_lshift()
789 set_DSPControl_overflow_flag(1, 22, env); in mipsdsp_sat32_lshift()
802 temp = (uint32_t)a << 1; in mipsdsp_rnd8_rashift()
804 temp = (int32_t)(int8_t)a >> (s - 1); in mipsdsp_rnd8_rashift()
807 return (temp + 1) >> 1; in mipsdsp_rnd8_rashift()
815 temp = (uint32_t)a << 1; in mipsdsp_rnd16_rashift()
817 temp = (int32_t)(int16_t)a >> (s - 1); in mipsdsp_rnd16_rashift()
820 return (temp + 1) >> 1; in mipsdsp_rnd16_rashift()
828 temp = (uint64_t)a << 1; in mipsdsp_rnd32_rashift()
830 temp = (int64_t)(int32_t)a >> (s - 1); in mipsdsp_rnd32_rashift()
832 temp += 1; in mipsdsp_rnd32_rashift()
834 return (temp >> 1) & 0xFFFFFFFFull; in mipsdsp_rnd32_rashift()
843 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sub_i16()
861 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat16_sub()
879 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sat32_sub()
891 return (temp >> 1) & 0x0000FFFF; in mipsdsp_rshift1_sub_q16()
899 temp += 1; in mipsdsp_rrshift1_sub_q16()
901 return (temp >> 1) & 0x0000FFFF; in mipsdsp_rrshift1_sub_q16()
910 return (temp >> 1) & 0xFFFFFFFFull; in mipsdsp_rshift1_sub_q32()
918 temp += 1; in mipsdsp_rrshift1_sub_q32()
920 return (temp >> 1) & 0xFFFFFFFFull; in mipsdsp_rrshift1_sub_q32()
931 if (temp16 == 1) { in mipsdsp_sub_u16_u16()
932 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sub_u16_u16()
946 if (temp16 == 1) { in mipsdsp_satu16_sub_u16_u16()
948 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_satu16_sub_u16_u16()
961 if (temp8 == 1) { in mipsdsp_sub_u8()
962 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sub_u8()
975 if (temp8 == 1) { in mipsdsp_satu8_sub()
977 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_satu8_sub()
990 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_sub32()
1003 set_DSPControl_overflow_flag(1, 20, env); in mipsdsp_add_i32()
1263 tempD = ((uint16_t)rs3 - (uint16_t)rt3 + var) >> 1; \
1264 tempC = ((uint16_t)rs2 - (uint16_t)rt2 + var) >> 1; \
1265 tempB = ((uint16_t)rs1 - (uint16_t)rt1 + var) >> 1; \
1266 tempA = ((uint16_t)rs0 - (uint16_t)rt0 + var) >> 1; \
1273 SUBUH_QB(subuh_r, 1);
1304 set_DSPControl_overflow_flag(1, 20, env); in helper_addwc()
1392 /* If sa = 0, then (sa - 1) = -1 will case shift error, so we need else. */ in helper_precr_sra_r_ph_w()
1394 tempB = (rt & MIPSDSP_LO) << 1; in helper_precr_sra_r_ph_w()
1395 tempA = (rs & MIPSDSP_LO) << 1; in helper_precr_sra_r_ph_w()
1397 tempB = ((int32_t)rt >> (sa - 1)) + 1; in helper_precr_sra_r_ph_w()
1398 tempA = ((int32_t)rs >> (sa - 1)) + 1; in helper_precr_sra_r_ph_w()
1400 rt = (((tempB >> 1) & MIPSDSP_LO) << 16) | ((tempA >> 1) & MIPSDSP_LO); in helper_precr_sra_r_ph_w()
1483 PRECR_QH_PW(sra_r, 1);
1593 temp[1] = mipsdsp_sat8_reduce_precision(rt1, env); in helper_precrqu_s_ob_qh()
2048 if (use_ac_env == 1) { \
2065 MUL_VOID_PH(mulsaq_s_w_ph, 1);
2158 temp[1] = 0x00; in helper_mulsaq_s_w_qh()
2160 temp[1] = ~0ull; in helper_mulsaq_s_w_qh()
2164 acc[1] = env->active_tc.HI[ac]; in helper_mulsaq_s_w_qh()
2169 acc[1] += 1; in helper_mulsaq_s_w_qh()
2172 acc[1] += temp[1]; in helper_mulsaq_s_w_qh()
2174 env->active_tc.HI[ac] = acc[1]; in helper_mulsaq_s_w_qh()
2210 DP_QB(dpau_h_qbl, mul_u8_u8, 1, 24, 16, 24, 16);
2211 DP_QB(dpau_h_qbr, mul_u8_u8, 1, 8, 0, 8, 0);
2232 temp[1] = 0; \
2252 acc[1] = env->active_tc.HI[ac]; \
2258 acc[1] += 1; \
2261 temp[1] = acc[1] + temp[1]; \
2265 acc[1] -= 1; \
2268 temp[1] = acc[1] - temp[1]; \
2271 env->active_tc.HI[ac] = temp[1]; \
2275 DP_OB(dpau_h_obl, 1, 56, 48, 40, 32, 56, 48, 40, 32);
2276 DP_OB(dpau_h_obr, 1, 24, 16, 8, 0, 24, 16, 8, 0);
2312 DP_NOFUNC_PH(dpa_w_ph, 1, 16, 0, 16, 0);
2313 DP_NOFUNC_PH(dpax_w_ph, 1, 16, 0, 0, 16);
2350 DP_HASFUNC_PH(dpaq_s_w_ph, 1, 16, 0, 16, 0);
2351 DP_HASFUNC_PH(dpaqx_s_w_ph, 1, 16, 0, 0, 16);
2384 set_DSPControl_overflow_flag(1, 16 + ac, env); \
2387 if ((tempC63 == 1) && (tempC62_31 != 0xFFFFFFFF)) { \
2389 set_DSPControl_overflow_flag(1, 16 + ac, env); \
2398 DP_128OPERATION_PH(dpaqx_sa_w_ph, 1);
2434 temp[1] = 0; \
2436 temp[1] = ~0ull; \
2439 acc[1] = env->active_tc.HI[ac]; \
2446 acc[1] = acc[1] + 1; \
2449 temp[1] = acc[1] + temp[1]; \
2453 acc[1] = acc[1] - 1; \
2456 temp[1] = acc[1] - temp[1]; \
2459 env->active_tc.HI[ac] = temp[1]; \
2463 DP_QH(dpa_w_qh, 1, 0);
2464 DP_QH(dpaq_s_w_qh, 1, 1);
2466 DP_QH(dpsq_s_w_qh, 0, 1);
2496 if (temp63 == 1) { \
2497 temp = (0x01ull << 63) - 1; \
2502 set_DSPControl_overflow_flag(1, 16 + ac, env); \
2511 DP_L_W(dpaq_sa_l_w, 1);
2529 temp[1] = 0; \
2538 tempB[1] = 0x00; \
2540 tempB[1] = ~0ull; \
2544 tempA[1] = 0x00; \
2546 tempA[1] = ~0ull; \
2552 temp[1] += 1; \
2555 temp[1] += tempB[1] + tempA[1]; \
2559 env->active_tc.HI[ac] = acc[1]; \
2587 tempB[1] = 0x00; in helper_mulsaq_s_l_pw()
2589 tempB[1] = ~0ull; in helper_mulsaq_s_l_pw()
2593 tempA[1] = 0x00; in helper_mulsaq_s_l_pw()
2595 tempA[1] = ~0ull; in helper_mulsaq_s_l_pw()
2599 acc[1] = env->active_tc.HI[ac]; in helper_mulsaq_s_l_pw()
2603 tempB[1] -= 1; in helper_mulsaq_s_l_pw()
2606 temp[1] = tempB[1] - tempA[1]; in helper_mulsaq_s_l_pw()
2608 if ((temp[1] & 0x01) == 0) { in helper_mulsaq_s_l_pw()
2609 temp[1] = 0x00; in helper_mulsaq_s_l_pw()
2611 temp[1] = ~0ull; in helper_mulsaq_s_l_pw()
2617 acc[1] += 1; in helper_mulsaq_s_l_pw()
2620 acc[1] += temp[1]; in helper_mulsaq_s_l_pw()
2622 env->active_tc.HI[ac] = acc[1]; in helper_mulsaq_s_l_pw()
2688 set_DSPControl_overflow_flag(1, 21, env); \
2690 tempL = ((int64_t)rs_t * (int64_t)rt_t) << 1; \
2716 temp[1] = 0; \
2724 temp[1] = 0x00; \
2726 temp[1] = ~0ull; \
2730 acc[1] = env->active_tc.HI[ac]; \
2735 acc[1] += 1; \
2738 acc[1] += temp[1]; \
2740 env->active_tc.HI[ac] = acc[1]; \
2766 acc[1] = 0x00; \
2768 acc[1] = ~0ull; \
2771 env->active_tc.HI[ac] = acc[1]; \
2792 temp[1] = 0; \
2799 temp[1] = 0x00; \
2801 temp[1] = ~0ull; \
2805 acc[1] = env->active_tc.HI[ac]; \
2810 acc[1] += 1; \
2813 acc[1] += temp[1]; \
2815 env->active_tc.HI[ac] = acc[1]; \
2836 temp[1] = 0x00; \
2846 tempBL[1] = 0x0; \
2848 tempBL[1] = ~0ull; \
2852 tempAL[1] = 0x0; \
2854 tempAL[1] = ~0ull; \
2859 tempBL[1] = 0; \
2860 tempAL[1] = 0; \
2863 acc[1] = env->active_tc.HI[ac]; \
2869 temp[1] += 1; \
2872 temp[1] += tempBL[1] + tempAL[1]; \
2878 acc[1] += 1; \
2881 temp[1] = acc[1] + temp[1]; \
2885 acc[1] -= 1; \
2888 temp[1] = acc[1] - temp[1]; \
2891 env->active_tc.HI[ac] = temp[1]; \
2895 DM_OPERATE(dmadd, mul_i32_i32, 1, 1);
2896 DM_OPERATE(dmaddu, mul_u32_u32, 1, 0);
2897 DM_OPERATE(dmsub, mul_i32_i32, 0, 1);
2912 rd = (rd << 1) | (temp & 1); in helper_bitrev()
2913 temp = temp >> 1; in helper_bitrev()
2933 msb = pos + size - 1; \
3075 cc = cc == 1 ? rs_t : rt_t; \
3087 PICK_INSN(pick_qb, 4, MIPSDSP_Q0, 8, 1);
3088 PICK_INSN(pick_ph, 2, MIPSDSP_LO, 16, 1);
3129 if ((tempDL[1] != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_w()
3130 (tempDL[1] != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_w()
3131 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_w()
3134 tempI = (tempDL[0] >> 1) & MIPSDSP_LLO; in helper_extr_w()
3136 tempDL[0] += 1; in helper_extr_w()
3138 tempDL[1] += 1; in helper_extr_w()
3141 if (((tempDL[1] & 0x01) != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_w()
3142 ((tempDL[1] & 0x01) != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_w()
3143 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_w()
3157 if ((tempDL[1] != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_r_w()
3158 (tempDL[1] != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_r_w()
3159 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_r_w()
3162 tempDL[0] += 1; in helper_extr_r_w()
3164 tempDL[1] += 1; in helper_extr_r_w()
3167 if (((tempDL[1] & 0x01) != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_r_w()
3168 ((tempDL[1] & 0x01) != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_r_w()
3169 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_r_w()
3172 return (target_long)(int32_t)(tempDL[0] >> 1); in helper_extr_r_w()
3184 if ((tempDL[1] != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_rs_w()
3185 (tempDL[1] != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_rs_w()
3186 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_rs_w()
3188 tempDL[0] += 1; in helper_extr_rs_w()
3190 tempDL[1] += 1; in helper_extr_rs_w()
3192 tempI = tempDL[0] >> 1; in helper_extr_rs_w()
3194 if (((tempDL[1] & 0x01) != 0 || (tempDL[0] & MIPSDSP_LHI) != 0) && in helper_extr_rs_w()
3195 ((tempDL[1] & 0x01) != 1 || (tempDL[0] & MIPSDSP_LHI) != MIPSDSP_LHI)) { in helper_extr_rs_w()
3196 temp64 = tempDL[1] & 0x01; in helper_extr_rs_w()
3202 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_rs_w()
3218 return (int64_t)(int32_t)(temp[0] >> 1); in helper_dextr_w()
3230 temp[0] += 1; in helper_dextr_r_w()
3232 temp[1] += 1; in helper_dextr_r_w()
3233 if (temp[1] == 0) { in helper_dextr_r_w()
3234 temp[2] += 1; in helper_dextr_r_w()
3240 if ((temp128 != 0 || temp[1] != 0) && in helper_dextr_r_w()
3241 (temp128 != 1 || temp[1] != ~0ull)) { in helper_dextr_r_w()
3242 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_r_w()
3245 return (int64_t)(int32_t)(temp[0] >> 1); in helper_dextr_r_w()
3257 temp[0] += 1; in helper_dextr_rs_w()
3259 temp[1] += 1; in helper_dextr_rs_w()
3260 if (temp[1] == 0) { in helper_dextr_rs_w()
3261 temp[2] += 1; in helper_dextr_rs_w()
3267 if ((temp128 != 0 || temp[1] != 0) && in helper_dextr_rs_w()
3268 (temp128 != 1 || temp[1] != ~0ull)) { in helper_dextr_rs_w()
3274 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_rs_w()
3277 return (int64_t)(int32_t)(temp[0] >> 1); in helper_dextr_rs_w()
3289 return (temp[1] << 63) | (temp[0] >> 1); in helper_dextr_l()
3301 temp[0] += 1; in helper_dextr_r_l()
3303 temp[1] += 1; in helper_dextr_r_l()
3304 if (temp[1] == 0) { in helper_dextr_r_l()
3305 temp[2] += 1; in helper_dextr_r_l()
3311 if ((temp128 != 0 || temp[1] != 0) && in helper_dextr_r_l()
3312 (temp128 != 1 || temp[1] != ~0ull)) { in helper_dextr_r_l()
3313 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_r_l()
3316 return (temp[1] << 63) | (temp[0] >> 1); in helper_dextr_r_l()
3328 temp[0] += 1; in helper_dextr_rs_l()
3330 temp[1] += 1; in helper_dextr_rs_l()
3331 if (temp[1] == 0) { in helper_dextr_rs_l()
3332 temp[2] += 1; in helper_dextr_rs_l()
3338 if ((temp128 != 0 || temp[1] != 0) && in helper_dextr_rs_l()
3339 (temp128 != 1 || temp[1] != ~0ull)) { in helper_dextr_rs_l()
3341 temp[1] &= ~0x00ull - 1; in helper_dextr_rs_l()
3342 temp[0] |= ~0x00ull - 1; in helper_dextr_rs_l()
3344 temp[1] |= 0x01; in helper_dextr_rs_l()
3347 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_rs_l()
3350 return (temp[1] << 63) | (temp[0] >> 1); in helper_dextr_rs_l()
3368 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_s_h()
3371 set_DSPControl_overflow_flag(1, 23, env); in helper_extr_s_h()
3389 temp127 = (temp[1] >> 63) & 0x01; in helper_dextr_s_h()
3391 if ((temp127 == 0) && (temp[1] > 0 || temp[0] > 32767)) { in helper_dextr_s_h()
3394 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_s_h()
3395 } else if ((temp127 == 1) && in helper_dextr_s_h()
3396 (temp[1] < 0xFFFFFFFFFFFFFFFFll in helper_dextr_s_h()
3400 set_DSPControl_overflow_flag(1, 23, env); in helper_dextr_s_h()
3419 sub = start_pos - (size + 1); in helper_extp()
3420 if (sub >= -1) { in helper_extp()
3426 set_DSPControl_efi(1, env); in helper_extp()
3443 sub = start_pos - (size + 1); in helper_extpdp()
3444 if (sub >= -1) { in helper_extpdp()
3447 temp = extract64(acc, start_pos - size, size + 1); in helper_extpdp()
3452 set_DSPControl_efi(1, env); in helper_extpdp()
3476 sub = start_pos - (size + 1); in helper_dextp()
3478 if (sub >= -1) { in helper_dextp()
3480 temp = temp & ((1ULL << (size + 1)) - 1); in helper_dextp()
3483 set_DSPControl_efi(1, env); in helper_dextp()
3505 sub = start_pos - (size + 1); in helper_dextpdp()
3507 if (sub >= -1) { in helper_dextpdp()
3509 temp = temp & ((1ULL << (size + 1)) - 1); in helper_dextpdp()
3513 set_DSPControl_efi(1, env); in helper_dextpdp()
3552 shift_t = (int8_t)(shift << 1) >> 1; in helper_dshilo()
3629 if (mask[0] == 1) { in cpu_wrdsp()
3641 if (mask[1] == 1) { in cpu_wrdsp()
3647 if (mask[2] == 1) { in cpu_wrdsp()
3653 if (mask[3] == 1) { in cpu_wrdsp()
3659 if (mask[4] == 1) { in cpu_wrdsp()
3669 if (mask[5] == 1) { in cpu_wrdsp()
3695 ruler = ruler << 1; in cpu_rddsp()
3701 if (mask[0] == 1) { in cpu_rddsp()
3709 if (mask[1] == 1) { in cpu_rddsp()
3713 if (mask[2] == 1) { in cpu_rddsp()
3717 if (mask[3] == 1) { in cpu_rddsp()
3721 if (mask[4] == 1) { in cpu_rddsp()
3729 if (mask[5] == 1) { in cpu_rddsp()