174 static TCGv_i32 reg_for_read(DisasContext *dc, int reg)  in reg_for_read()  function
200     ra = reg_for_read(dc, arg->ra);  in do_typea()
201     rb = reg_for_read(dc, arg->rb);  in do_typea()
216     ra = reg_for_read(dc, arg->ra);  in do_typea0()
231     ra = reg_for_read(dc, arg->ra);  in do_typeb_imm()
246     ra = reg_for_read(dc, arg->ra);  in do_typeb_val()
907     tcg_gen_qemu_st_i32(reg_for_read(dc, rd), addr, mem_index, mop);  in do_store()
932     gen_helper_sbea(tcg_env, reg_for_read(dc, arg->rd), addr);  in trans_sbea()
966         (tcg_env, reg_for_read(dc, arg->rd), addr);  in trans_shea()
1000         (tcg_env, reg_for_read(dc, arg->rd), addr);  in trans_swea()
1124     tcg_gen_mov_i32(cpu_bvalue, reg_for_read(dc, ra));  in DO_BR()
1139                         reg_for_read(dc, ra), zero,  in DO_BR()
1171     tcg_gen_mov_i32(cpu_pc, reg_for_read(dc, arg->rb));  in DO_BCC()
1290     tcg_gen_addi_i32(cpu_btarget, reg_for_read(dc, arg->ra), arg->imm);  in do_rts()
1389     TCGv_i32 src = reg_for_read(dc, arg->ra);  in trans_mts()
1602     gen_helper_put(t_id, t_ctrl, reg_for_read(dc, ra));  in do_put()