Lines Matching +full:- +full:- +full:disable +full:- +full:attr
4 * Copyright (c) 2006-2007 CodeSourcery
24 #include "exec/page-protection.h"
27 #include "exec/helper-proto.h"
31 #include "qemu/qemu-print.h"
38 CPUM68KState *env = &cpu->env; in cf_fpu_gdb_get_reg()
42 float_status s = env->fp_status; in cf_fpu_gdb_get_reg()
43 return gdb_get_reg64(mem_buf, floatx80_to_float64(env->fregs[n].d, &s)); in cf_fpu_gdb_get_reg()
47 return gdb_get_reg32(mem_buf, env->fpcr); in cf_fpu_gdb_get_reg()
49 return gdb_get_reg32(mem_buf, env->fpsr); in cf_fpu_gdb_get_reg()
59 CPUM68KState *env = &cpu->env; in cf_fpu_gdb_set_reg()
63 float_status s = env->fp_status; in cf_fpu_gdb_set_reg()
64 env->fregs[n].d = float64_to_floatx80(ldq_be_p(mem_buf), &s); in cf_fpu_gdb_set_reg()
72 env->fpsr = ldl_be_p(mem_buf); in cf_fpu_gdb_set_reg()
83 CPUM68KState *env = &cpu->env; in m68k_fpu_gdb_get_reg()
86 int len = gdb_get_reg16(mem_buf, env->fregs[n].l.upper); in m68k_fpu_gdb_get_reg()
88 len += gdb_get_reg64(mem_buf, env->fregs[n].l.lower); in m68k_fpu_gdb_get_reg()
93 return gdb_get_reg32(mem_buf, env->fpcr); in m68k_fpu_gdb_get_reg()
105 CPUM68KState *env = &cpu->env; in m68k_fpu_gdb_set_reg()
108 env->fregs[n].l.upper = lduw_be_p(mem_buf); in m68k_fpu_gdb_set_reg()
109 env->fregs[n].l.lower = ldq_be_p(mem_buf + 4); in m68k_fpu_gdb_set_reg()
128 CPUM68KState *env = &cpu->env; in m68k_cpu_init_gdb()
132 gdb_find_static_feature("cf-fp.xml"), 18); in m68k_cpu_init_gdb()
135 gdb_find_static_feature("m68k-fp.xml"), 18); in m68k_cpu_init_gdb()
144 env->cacr = val; in HELPER()
154 env->vbr = val; in HELPER()
168 cs->exception_index = tt; in raise_exception_ra()
177 env->sfc = val & 7; in HELPER()
181 env->dfc = val & 7; in HELPER()
185 env->vbr = val; in HELPER()
190 env->cacr = val & 0x0000000f; in HELPER()
192 env->cacr = val & 0x00003f1f; in HELPER()
194 env->cacr = val & 0x80008000; in HELPER()
196 env->cacr = val & 0xf8e0e000; in HELPER()
206 env->mmu.tcr = val; in HELPER()
213 env->mmu.mmusr = val; in HELPER()
221 env->mmu.srp = val; in HELPER()
229 env->mmu.urp = val; in HELPER()
235 env->sp[M68K_USP] = val; in HELPER()
242 env->sp[M68K_SSP] = val; in HELPER()
251 env->sp[M68K_ISP] = val; in HELPER()
258 env->mmu.ttr[M68K_ITTR0] = val; in HELPER()
265 env->mmu.ttr[M68K_ITTR1] = val; in HELPER()
272 env->mmu.ttr[M68K_DTTR0] = val; in HELPER()
279 env->mmu.ttr[M68K_DTTR1] = val; in HELPER()
301 return env->sfc; in HELPER()
304 return env->dfc; in HELPER()
307 return env->vbr; in HELPER()
314 return env->cacr; in HELPER()
321 return env->mmu.tcr; in HELPER()
327 return env->mmu.mmusr; in HELPER()
334 return env->mmu.srp; in HELPER()
341 return env->mmu.urp; in HELPER()
346 return env->sp[M68K_USP]; in HELPER()
352 return env->sp[M68K_SSP]; in HELPER()
360 return env->sp[M68K_ISP]; in HELPER()
366 return env->mmu.ttr[M68K_ITTR0]; in HELPER()
372 return env->mmu.ttr[M68K_ITTR1]; in HELPER()
378 return env->mmu.ttr[M68K_DTTR0]; in HELPER()
384 return env->mmu.ttr[M68K_DTTR1]; in HELPER()
408 if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) { in HELPER()
410 regval = env->macc[i]; in HELPER()
412 if (env->macsr & MACSR_FI) { in HELPER()
419 if (env->macsr & MACSR_FI) { in HELPER()
422 } else if (env->macsr & MACSR_SU) { in HELPER()
429 env->macc[i] = regval; in HELPER()
432 env->macsr = val; in HELPER()
439 env->sp[env->current_sp] = env->aregs[7]; in m68k_switch_sp()
441 if (env->sr & SR_S) { in m68k_switch_sp()
442 /* SR:Master-Mode bit unimplemented then ISP is not available */ in m68k_switch_sp()
443 if (!m68k_feature(env, M68K_FEATURE_MSP) || env->sr & SR_M) { in m68k_switch_sp()
452 new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP) in m68k_switch_sp()
455 env->aregs[7] = env->sp[new_sp]; in m68k_switch_sp()
456 env->current_sp = new_sp; in m68k_switch_sp()
463 uint32_t size, int attr) in print_address_zone() argument
465 qemu_printf("%08x - %08x -> %08x - %08x %c ", in print_address_zone()
466 logical, logical + size - 1, in print_address_zone()
467 physical, physical + size - 1, in print_address_zone()
468 attr & 4 ? 'W' : '-'); in print_address_zone()
492 int last_attr = -1, attr = -1; in dump_address_map() local
496 if (env->mmu.tcr & M68K_TCR_PAGE_8K) { in dump_address_map()
508 tia = address_space_ldl(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4, in dump_address_map()
514 tib = address_space_ldl(cs->as, M68K_POINTER_BASE(tia) + j * 4, in dump_address_map()
520 tic = address_space_ldl(cs->as, (tib & tib_mask) + k * 4, in dump_address_map()
526 tic = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(tic), in dump_address_map()
539 physical = tic & ~((1 << tic_shift) - 1); in dump_address_map()
541 last_attr = attr; in dump_address_map()
542 attr = tic & ((1 << tic_shift) - 1); in dump_address_map()
546 (attr & 4) != (last_attr & 4)) { in dump_address_map()
549 size = last_logical + (1 << tic_shift) - in dump_address_map()
560 if (first_logical != logical || (attr & 4) != (last_attr & 4)) { in dump_address_map()
561 size = logical + (1 << tic_shift) - first_logical; in dump_address_map()
568 case M68K_DESC_CM_WRTHRU: /* cacheable, write-through */ \
614 if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { in dump_mmu()
619 if (env->mmu.tcr & M68K_TCR_PAGE_8K) { in dump_mmu()
626 if (env->mmu.mmusr & M68K_MMU_B_040) { in dump_mmu()
629 qemu_printf("Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000); in dump_mmu()
631 if (env->mmu.mmusr & M68K_MMU_G_040) { in dump_mmu()
636 if (env->mmu.mmusr & M68K_MMU_S_040) { in dump_mmu()
641 if (env->mmu.mmusr & M68K_MMU_M_040) { in dump_mmu()
646 if (env->mmu.mmusr & M68K_MMU_WP_040) { in dump_mmu()
651 if (env->mmu.mmusr & M68K_MMU_T_040) { in dump_mmu()
656 if (env->mmu.mmusr & M68K_MMU_R_040) { in dump_mmu()
662 DUMP_CACHEFLAGS(env->mmu.mmusr); in dump_mmu()
663 qemu_printf(" U: %d\n", (env->mmu.mmusr >> 8) & 3); in dump_mmu()
668 dump_ttr(env->mmu.ttr[M68K_ITTR0]); in dump_mmu()
670 dump_ttr(env->mmu.ttr[M68K_ITTR1]); in dump_mmu()
672 dump_ttr(env->mmu.ttr[M68K_DTTR0]); in dump_mmu()
674 dump_ttr(env->mmu.ttr[M68K_DTTR1]); in dump_mmu()
676 qemu_printf("SRP: 0x%08x\n", env->mmu.srp); in dump_mmu()
677 dump_address_map(env, env->mmu.srp); in dump_mmu()
679 qemu_printf("URP: 0x%08x\n", env->mmu.urp); in dump_mmu()
680 dump_address_map(env, env->mmu.urp); in dump_mmu()
708 /* all other values disable mode matching (FC2) */ in check_TTR()
745 if (check_TTR(env->mmu.TTR(access_type, i), in get_physical_address()
749 env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040; in get_physical_address()
763 next = env->mmu.srp; in get_physical_address()
765 next = env->mmu.urp; in get_physical_address()
771 next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); in get_physical_address()
776 return -1; in get_physical_address()
779 address_space_stl(cs->as, entry, next | M68K_DESC_USED, in get_physical_address()
787 env->mmu.mmusr |= M68K_MMU_WP_040; in get_physical_address()
791 return -1; in get_physical_address()
798 next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); in get_physical_address()
803 return -1; in get_physical_address()
806 address_space_stl(cs->as, entry, next | M68K_DESC_USED, in get_physical_address()
814 env->mmu.mmusr |= M68K_MMU_WP_040; in get_physical_address()
818 return -1; in get_physical_address()
823 if (env->mmu.tcr & M68K_TCR_PAGE_8K) { in get_physical_address()
829 next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); in get_physical_address()
835 return -1; in get_physical_address()
838 next = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(next), in get_physical_address()
847 address_space_stl(cs->as, entry, next | M68K_DESC_USED, in get_physical_address()
855 address_space_stl(cs->as, entry, in get_physical_address()
864 address_space_stl(cs->as, entry, next | M68K_DESC_USED, in get_physical_address()
872 if (env->mmu.tcr & M68K_TCR_PAGE_8K) { in get_physical_address()
878 page_mask = ~(*page_size - 1); in get_physical_address()
879 *physical = (next & page_mask) + (address & (*page_size - 1)); in get_physical_address()
882 env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040; in get_physical_address()
883 env->mmu.mmusr |= *physical & 0xfffff000; in get_physical_address()
884 env->mmu.mmusr |= M68K_MMU_R_040; in get_physical_address()
890 return -1; in get_physical_address()
895 return -1; in get_physical_address()
907 return -1; in get_physical_address()
918 if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { in m68k_cpu_get_phys_page_debug()
924 if (env->sr & SR_S) { in m68k_cpu_get_phys_page_debug()
930 return -1; in m68k_cpu_get_phys_page_debug()
945 CPUM68KState *env = &cpu->env; in m68k_set_irq_level()
947 env->pending_level = level; in m68k_set_irq_level()
948 env->pending_vector = vector; in m68k_set_irq_level()
967 if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { in m68k_cpu_tlb_fill()
1001 env->mmu.ssw = M68K_ATC_040; in m68k_cpu_tlb_fill()
1004 env->mmu.ssw |= M68K_BA_SIZE_BYTE; in m68k_cpu_tlb_fill()
1007 env->mmu.ssw |= M68K_BA_SIZE_WORD; in m68k_cpu_tlb_fill()
1010 env->mmu.ssw |= M68K_BA_SIZE_LONG; in m68k_cpu_tlb_fill()
1014 env->mmu.ssw |= M68K_TM_040_SUPER; in m68k_cpu_tlb_fill()
1017 env->mmu.ssw |= M68K_TM_040_CODE; in m68k_cpu_tlb_fill()
1019 env->mmu.ssw |= M68K_TM_040_DATA; in m68k_cpu_tlb_fill()
1022 env->mmu.ssw |= M68K_RW_040; in m68k_cpu_tlb_fill()
1025 cs->exception_index = EXCP_ACCESS; in m68k_cpu_tlb_fill()
1026 env->mmu.ar = address; in m68k_cpu_tlb_fill()
1042 for (n = 32; x; n--) in HELPER()
1058 env->sr = sr & 0xffe0; in cpu_m68k_set_sr()
1072 * in-place.
1077 env->macc[dest] = env->macc[src]; in HELPER()
1079 if (env->macsr & (MACSR_PAV0 << src)) in HELPER()
1080 env->macsr |= mask; in HELPER()
1082 env->macsr &= ~mask; in HELPER()
1093 env->macsr |= MACSR_V; in HELPER()
1094 if (env->macsr & MACSR_OMC) { in HELPER()
1111 env->macsr |= MACSR_V; in HELPER()
1112 if (env->macsr & MACSR_OMC) { in HELPER()
1116 product &= ((1ull << 40) - 1); in HELPER()
1128 if (env->macsr & MACSR_RT) { in HELPER()
1145 tmp = env->macc[acc]; in HELPER()
1148 env->macsr |= MACSR_V; in HELPER()
1150 if (env->macsr & MACSR_V) { in HELPER()
1151 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1152 if (env->macsr & MACSR_OMC) { in HELPER()
1161 env->macc[acc] = result; in HELPER()
1168 val = env->macc[acc]; in HELPER()
1170 env->macsr |= MACSR_V; in HELPER()
1172 if (env->macsr & MACSR_V) { in HELPER()
1173 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1174 if (env->macsr & MACSR_OMC) { in HELPER()
1178 val = (1ull << 48) - 1; in HELPER()
1180 val &= ((1ull << 48) - 1); in HELPER()
1183 env->macc[acc] = val; in HELPER()
1191 sum = env->macc[acc]; in HELPER()
1194 env->macsr |= MACSR_V; in HELPER()
1196 if (env->macsr & MACSR_V) { in HELPER()
1197 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1198 if (env->macsr & MACSR_OMC) { in HELPER()
1202 env->macc[acc] = result; in HELPER()
1208 val = env->macc[acc]; in HELPER()
1210 env->macsr |= MACSR_Z; in HELPER()
1212 env->macsr |= MACSR_N; in HELPER()
1214 if (env->macsr & (MACSR_PAV0 << acc)) { in HELPER()
1215 env->macsr |= MACSR_V; in HELPER()
1217 if (env->macsr & MACSR_FI) { in HELPER()
1219 if (val != 0 && val != -1) in HELPER()
1220 env->macsr |= MACSR_EV; in HELPER()
1221 } else if (env->macsr & MACSR_SU) { in HELPER()
1223 if (val != 0 && val != -1) in HELPER()
1224 env->macsr |= MACSR_EV; in HELPER()
1227 env->macsr |= MACSR_EV; in HELPER()
1245 src1 = EXTSIGN(res - src2, op - CC_OP_ADDB); \
1255 src1 = EXTSIGN(res + src2, op - CC_OP_SUBB); \
1265 res = EXTSIGN(src1 - src2, op - CC_OP_CMPB); \
1285 x = env->cc_x; in cpu_m68k_get_ccr()
1286 n = env->cc_n; in cpu_m68k_get_ccr()
1287 z = env->cc_z; in cpu_m68k_get_ccr()
1288 v = env->cc_v; in cpu_m68k_get_ccr()
1289 c = env->cc_c; in cpu_m68k_get_ccr()
1291 COMPUTE_CCR(env->cc_op, x, n, z, v, c); in cpu_m68k_get_ccr()
1307 env->cc_x = (ccr & CCF_X ? 1 : 0); in cpu_m68k_set_ccr()
1308 env->cc_n = (ccr & CCF_N ? -1 : 0); in cpu_m68k_set_ccr()
1309 env->cc_z = (ccr & CCF_Z ? 0 : 1); in cpu_m68k_set_ccr()
1310 env->cc_v = (ccr & CCF_V ? -1 : 0); in cpu_m68k_set_ccr()
1311 env->cc_c = (ccr & CCF_C ? 1 : 0); in cpu_m68k_set_ccr()
1312 env->cc_op = CC_OP_FLAGS; in cpu_m68k_set_ccr()
1324 COMPUTE_CCR(cc_op, env->cc_x, env->cc_n, env->cc_z, env->cc_v, env->cc_c); in HELPER()
1325 env->cc_op = CC_OP_FLAGS; in HELPER()
1333 if (env->macsr & MACSR_SU) { in HELPER()
1334 /* 16-bit rounding. */ in HELPER()
1341 } else if (env->macsr & MACSR_RT) { in HELPER()
1342 /* 32-bit rounding. */ in HELPER()
1353 if (env->macsr & MACSR_OMC) { in HELPER()
1355 if (env->macsr & MACSR_SU) { in HELPER()
1370 if (env->macsr & MACSR_SU) { in HELPER()
1400 val = env->macc[acc] & 0x00ff; in HELPER()
1401 val |= (env->macc[acc] >> 32) & 0xff00; in HELPER()
1402 val |= (env->macc[acc + 1] << 16) & 0x00ff0000; in HELPER()
1403 val |= (env->macc[acc + 1] >> 16) & 0xff000000; in HELPER()
1410 val = (env->macc[acc] >> 32) & 0xffff; in HELPER()
1411 val |= (env->macc[acc + 1] >> 16) & 0xffff0000; in HELPER()
1419 res = env->macc[acc] & 0xffffffff00ull; in HELPER()
1423 env->macc[acc] = res; in HELPER()
1424 res = env->macc[acc + 1] & 0xffffffff00ull; in HELPER()
1428 env->macc[acc + 1] = res; in HELPER()
1435 res = (uint32_t)env->macc[acc]; in HELPER()
1438 env->macc[acc] = res; in HELPER()
1439 res = (uint32_t)env->macc[acc + 1]; in HELPER()
1442 env->macc[acc + 1] = res; in HELPER()
1448 res = (uint32_t)env->macc[acc]; in HELPER()
1450 env->macc[acc] = res; in HELPER()
1451 res = (uint32_t)env->macc[acc + 1]; in HELPER()
1453 env->macc[acc + 1] = res; in HELPER()
1466 if (env->dfc & 4) { in HELPER()
1469 if ((env->dfc & 3) == 2) { in HELPER()
1476 env->mmu.mmusr = 0; in HELPER()
1477 env->mmu.ssw = 0; in HELPER()