Lines Matching full:s
106 uint8_t vex_v; /* vex vvvv register, without 1's complement. */
178 #define PE(S) true argument
179 #define CPL(S) 3 argument
180 #define IOPL(S) 0 argument
181 #define SVME(S) false argument
182 #define GUEST(S) false argument
184 #define PE(S) (((S)->flags & HF_PE_MASK) != 0) argument
185 #define CPL(S) ((S)->cpl) argument
186 #define IOPL(S) ((S)->iopl) argument
187 #define SVME(S) (((S)->flags & HF_SVME_MASK) != 0) argument
188 #define GUEST(S) (((S)->flags & HF_GUEST_MASK) != 0) argument
191 #define VM86(S) false argument
192 #define CODE32(S) true argument
193 #define SS32(S) true argument
194 #define ADDSEG(S) false argument
196 #define VM86(S) (((S)->flags & HF_VM_MASK) != 0) argument
197 #define CODE32(S) (((S)->flags & HF_CS32_MASK) != 0) argument
198 #define SS32(S) (((S)->flags & HF_SS32_MASK) != 0) argument
199 #define ADDSEG(S) (((S)->flags & HF_ADDSEG_MASK) != 0) argument
202 #define CODE64(S) false argument
204 #define CODE64(S) true argument
206 #define CODE64(S) (((S)->flags & HF_CS64_MASK) != 0) argument
209 #define LMA(S) (((S)->flags & HF_LMA_MASK) != 0) argument
211 #define LMA(S) false argument
215 #define REX_PREFIX(S) (((S)->prefix & PREFIX_REX) != 0) argument
216 #define REX_W(S) ((S)->vex_w) argument
217 #define REX_R(S) ((S)->rex_r + 0) argument
218 #define REX_X(S) ((S)->rex_x + 0) argument
219 #define REX_B(S) ((S)->rex_b + 0) argument
221 #define REX_PREFIX(S) false argument
222 #define REX_W(S) false argument
223 #define REX_R(S) 0 argument
224 #define REX_X(S) 0 argument
225 #define REX_B(S) 0 argument
257 static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num);
258 static void gen_jmp_rel_csize(DisasContext *s, int diff, int tb_num);
259 static void gen_exception_gpf(DisasContext *s);
328 static void set_cc_op_1(DisasContext *s, CCOp op, bool dirty) in set_cc_op_1() argument
332 if (s->cc_op == op) { in set_cc_op_1()
337 dead = cc_op_live(s->cc_op) & ~cc_op_live(op); in set_cc_op_1()
348 tcg_gen_discard_tl(s->cc_srcT); in set_cc_op_1()
351 if (dirty && s->cc_op == CC_OP_DYNAMIC) { in set_cc_op_1()
354 s->cc_op_dirty = dirty; in set_cc_op_1()
355 s->cc_op = op; in set_cc_op_1()
358 static void set_cc_op(DisasContext *s, CCOp op) in set_cc_op() argument
364 set_cc_op_1(s, op, op != CC_OP_DYNAMIC); in set_cc_op()
367 static void assume_cc_op(DisasContext *s, CCOp op) in assume_cc_op() argument
369 set_cc_op_1(s, op, false); in assume_cc_op()
372 static void gen_update_cc_op(DisasContext *s) in gen_update_cc_op() argument
374 if (s->cc_op_dirty) { in gen_update_cc_op()
375 tcg_gen_movi_i32(cpu_cc_op, s->cc_op); in gen_update_cc_op()
376 s->cc_op_dirty = false; in gen_update_cc_op()
410 static inline bool byte_reg_is_xH(DisasContext *s, int reg) in byte_reg_is_xH() argument
413 if (reg < 4 || REX_PREFIX(s)) { in byte_reg_is_xH()
420 static inline MemOp mo_pushpop(DisasContext *s, MemOp ot) in mo_pushpop() argument
422 if (CODE64(s)) { in mo_pushpop()
430 static inline MemOp mo_stacksize(DisasContext *s) in mo_stacksize() argument
432 return CODE64(s) ? MO_64 : SS32(s) ? MO_32 : MO_16; in mo_stacksize()
438 * register's TCGv.
441 * register's TCGv.
443 static TCGv gen_op_deposit_reg_v(DisasContext *s, MemOp ot, int reg, TCGv dest, TCGv t0) in gen_op_deposit_reg_v() argument
447 if (byte_reg_is_xH(s, reg)) { in gen_op_deposit_reg_v()
477 static void gen_op_mov_reg_v(DisasContext *s, MemOp ot, int reg, TCGv t0) in gen_op_mov_reg_v() argument
479 gen_op_deposit_reg_v(s, ot, reg, NULL, t0); in gen_op_mov_reg_v()
483 void gen_op_mov_v_reg(DisasContext *s, MemOp ot, TCGv t0, int reg) in gen_op_mov_v_reg() argument
485 if (ot == MO_8 && byte_reg_is_xH(s, reg)) { in gen_op_mov_v_reg()
492 static void gen_add_A0_im(DisasContext *s, int val) in gen_add_A0_im() argument
494 tcg_gen_addi_tl(s->A0, s->A0, val); in gen_add_A0_im()
495 if (!CODE64(s)) { in gen_add_A0_im()
496 tcg_gen_ext32u_tl(s->A0, s->A0); in gen_add_A0_im()
500 static inline void gen_op_jmp_v(DisasContext *s, TCGv dest) in gen_op_jmp_v() argument
503 s->pc_save = -1; in gen_op_jmp_v()
506 static inline void gen_op_add_reg(DisasContext *s, MemOp size, int reg, TCGv val) in gen_op_add_reg() argument
513 gen_op_mov_reg_v(s, size, reg, temp); in gen_op_add_reg()
521 void gen_op_add_reg_im(DisasContext *s, MemOp size, int reg, int32_t val) in gen_op_add_reg_im() argument
523 gen_op_add_reg(s, size, reg, tcg_constant_tl(val)); in gen_op_add_reg_im()
526 static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0) in gen_op_ld_v() argument
528 tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE); in gen_op_ld_v()
531 static inline void gen_op_st_v(DisasContext *s, int idx, TCGv t0, TCGv a0) in gen_op_st_v() argument
533 tcg_gen_qemu_st_tl(t0, a0, s->mem_index, idx | MO_LE); in gen_op_st_v()
536 static void gen_update_eip_next(DisasContext *s) in gen_update_eip_next() argument
538 assert(s->pc_save != -1); in gen_update_eip_next()
539 if (tb_cflags(s->base.tb) & CF_PCREL) { in gen_update_eip_next()
540 tcg_gen_addi_tl(cpu_eip, cpu_eip, s->pc - s->pc_save); in gen_update_eip_next()
541 } else if (CODE64(s)) { in gen_update_eip_next()
542 tcg_gen_movi_tl(cpu_eip, s->pc); in gen_update_eip_next()
544 tcg_gen_movi_tl(cpu_eip, (uint32_t)(s->pc - s->cs_base)); in gen_update_eip_next()
546 s->pc_save = s->pc; in gen_update_eip_next()
549 static void gen_update_eip_cur(DisasContext *s) in gen_update_eip_cur() argument
551 assert(s->pc_save != -1); in gen_update_eip_cur()
552 if (tb_cflags(s->base.tb) & CF_PCREL) { in gen_update_eip_cur()
553 tcg_gen_addi_tl(cpu_eip, cpu_eip, s->base.pc_next - s->pc_save); in gen_update_eip_cur()
554 } else if (CODE64(s)) { in gen_update_eip_cur()
555 tcg_gen_movi_tl(cpu_eip, s->base.pc_next); in gen_update_eip_cur()
557 tcg_gen_movi_tl(cpu_eip, (uint32_t)(s->base.pc_next - s->cs_base)); in gen_update_eip_cur()
559 s->pc_save = s->base.pc_next; in gen_update_eip_cur()
562 static int cur_insn_len(DisasContext *s) in cur_insn_len() argument
564 return s->pc - s->base.pc_next; in cur_insn_len()
567 static TCGv_i32 cur_insn_len_i32(DisasContext *s) in cur_insn_len_i32() argument
569 return tcg_constant_i32(cur_insn_len(s)); in cur_insn_len_i32()
572 static TCGv_i32 eip_next_i32(DisasContext *s) in eip_next_i32() argument
574 assert(s->pc_save != -1); in eip_next_i32()
583 if (CODE64(s)) { in eip_next_i32()
586 if (tb_cflags(s->base.tb) & CF_PCREL) { in eip_next_i32()
589 tcg_gen_addi_i32(ret, ret, s->pc - s->pc_save); in eip_next_i32()
592 return tcg_constant_i32(s->pc - s->cs_base); in eip_next_i32()
596 static TCGv eip_next_tl(DisasContext *s) in eip_next_tl() argument
598 assert(s->pc_save != -1); in eip_next_tl()
599 if (tb_cflags(s->base.tb) & CF_PCREL) { in eip_next_tl()
601 tcg_gen_addi_tl(ret, cpu_eip, s->pc - s->pc_save); in eip_next_tl()
603 } else if (CODE64(s)) { in eip_next_tl()
604 return tcg_constant_tl(s->pc); in eip_next_tl()
606 return tcg_constant_tl((uint32_t)(s->pc - s->cs_base)); in eip_next_tl()
610 static TCGv eip_cur_tl(DisasContext *s) in eip_cur_tl() argument
612 assert(s->pc_save != -1); in eip_cur_tl()
613 if (tb_cflags(s->base.tb) & CF_PCREL) { in eip_cur_tl()
615 tcg_gen_addi_tl(ret, cpu_eip, s->base.pc_next - s->pc_save); in eip_cur_tl()
617 } else if (CODE64(s)) { in eip_cur_tl()
618 return tcg_constant_tl(s->base.pc_next); in eip_cur_tl()
620 return tcg_constant_tl((uint32_t)(s->base.pc_next - s->cs_base)); in eip_cur_tl()
627 static void gen_lea_v_seg_dest(DisasContext *s, MemOp aflag, TCGv dest, TCGv a0, in gen_lea_v_seg_dest() argument
641 if (ovr_seg < 0 && ADDSEG(s)) { in gen_lea_v_seg_dest()
654 if (ADDSEG(s)) { in gen_lea_v_seg_dest()
670 } else if (CODE64(s)) { in gen_lea_v_seg_dest()
680 static void gen_lea_v_seg(DisasContext *s, TCGv a0, in gen_lea_v_seg() argument
683 gen_lea_v_seg_dest(s, s->aflag, s->A0, a0, def_seg, ovr_seg); in gen_lea_v_seg()
686 static inline void gen_string_movl_A0_ESI(DisasContext *s) in gen_string_movl_A0_ESI() argument
688 gen_lea_v_seg(s, cpu_regs[R_ESI], R_DS, s->override); in gen_string_movl_A0_ESI()
691 static inline void gen_string_movl_A0_EDI(DisasContext *s) in gen_string_movl_A0_EDI() argument
693 gen_lea_v_seg(s, cpu_regs[R_EDI], R_ES, -1); in gen_string_movl_A0_EDI()
708 static void gen_op_j_ecx(DisasContext *s, TCGCond cond, TCGLabel *label1) in gen_op_j_ecx() argument
710 TCGv tmp = gen_ext_tl(NULL, cpu_regs[R_ECX], s->aflag, false); in gen_op_j_ecx()
715 static inline void gen_op_jz_ecx(DisasContext *s, TCGLabel *label1) in gen_op_jz_ecx() argument
717 gen_op_j_ecx(s, TCG_COND_EQ, label1); in gen_op_jz_ecx()
720 static inline void gen_op_jnz_ecx(DisasContext *s, TCGLabel *label1) in gen_op_jnz_ecx() argument
722 gen_op_j_ecx(s, TCG_COND_NE, label1); in gen_op_jnz_ecx()
725 static void gen_set_hflag(DisasContext *s, uint32_t mask) in gen_set_hflag() argument
727 if ((s->flags & mask) == 0) { in gen_set_hflag()
732 s->flags |= mask; in gen_set_hflag()
736 static void gen_reset_hflag(DisasContext *s, uint32_t mask) in gen_reset_hflag() argument
738 if (s->flags & mask) { in gen_reset_hflag()
743 s->flags &= ~mask; in gen_reset_hflag()
747 static void gen_set_eflags(DisasContext *s, target_ulong mask) in gen_set_eflags() argument
756 static void gen_reset_eflags(DisasContext *s, target_ulong mask) in gen_reset_eflags() argument
803 static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, in gen_check_io() argument
811 gen_exception_gpf(s); in gen_check_io()
814 if (PE(s) && (CPL(s) > IOPL(s) || VM86(s))) { in gen_check_io()
817 if (GUEST(s)) { in gen_check_io()
818 gen_update_cc_op(s); in gen_check_io()
819 gen_update_eip_cur(s); in gen_check_io()
820 if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { in gen_check_io()
826 cur_insn_len_i32(s)); in gen_check_io()
832 static void gen_movs(DisasContext *s, MemOp ot, TCGv dshift) in gen_movs() argument
834 gen_string_movl_A0_ESI(s); in gen_movs()
835 gen_op_ld_v(s, ot, s->T0, s->A0); in gen_movs()
836 gen_string_movl_A0_EDI(s); in gen_movs()
837 gen_op_st_v(s, ot, s->T0, s->A0); in gen_movs()
839 gen_op_add_reg(s, s->aflag, R_ESI, dshift); in gen_movs()
840 gen_op_add_reg(s, s->aflag, R_EDI, dshift); in gen_movs()
844 static void gen_mov_eflags(DisasContext *s, TCGv reg) in gen_mov_eflags() argument
850 if (s->cc_op == CC_OP_EFLAGS) { in gen_mov_eflags()
860 live = cc_op_live(s->cc_op) & ~USES_CC_SRCT; in gen_mov_eflags()
875 if (s->cc_op != CC_OP_DYNAMIC) { in gen_mov_eflags()
876 cc_op = tcg_constant_i32(s->cc_op); in gen_mov_eflags()
884 static void gen_compute_eflags(DisasContext *s) in gen_compute_eflags() argument
886 gen_mov_eflags(s, cpu_cc_src); in gen_compute_eflags()
887 set_cc_op(s, CC_OP_EFLAGS); in gen_compute_eflags()
922 static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) in gen_prepare_eflags_c() argument
926 switch (s->cc_op) { in gen_prepare_eflags_c()
929 size = s->cc_op - CC_OP_SUBB; in gen_prepare_eflags_c()
930 tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); in gen_prepare_eflags_c()
932 return (CCPrepare) { .cond = TCG_COND_LTU, .reg = s->cc_srcT, in gen_prepare_eflags_c()
937 size = cc_op_size(s->cc_op); in gen_prepare_eflags_c()
954 size = cc_op_size(s->cc_op); in gen_prepare_eflags_c()
962 size = cc_op_size(s->cc_op); in gen_prepare_eflags_c()
966 size = cc_op_size(s->cc_op); in gen_prepare_eflags_c()
983 gen_update_cc_op(s); in gen_prepare_eflags_c()
995 static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg) in gen_prepare_eflags_p() argument
997 gen_compute_eflags(s); in gen_prepare_eflags_p()
1002 /* compute eflags.S, trying to store it in reg if not NULL */
1003 static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg) in gen_prepare_eflags_s() argument
1005 switch (s->cc_op) { in gen_prepare_eflags_s()
1007 gen_compute_eflags(s); in gen_prepare_eflags_s()
1018 return gen_prepare_sign_nz(cpu_cc_dst, cc_op_size(s->cc_op)); in gen_prepare_eflags_s()
1023 static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg) in gen_prepare_eflags_o() argument
1025 switch (s->cc_op) { in gen_prepare_eflags_o()
1036 gen_compute_eflags(s); in gen_prepare_eflags_o()
1043 static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg) in gen_prepare_eflags_z() argument
1045 switch (s->cc_op) { in gen_prepare_eflags_z()
1053 gen_update_cc_op(s); in gen_prepare_eflags_z()
1063 MemOp size = cc_op_size(s->cc_op); in gen_prepare_eflags_z()
1072 static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) in gen_prepare_cc() argument
1081 switch (s->cc_op) { in gen_prepare_cc()
1084 size = cc_op_size(s->cc_op); in gen_prepare_cc()
1087 tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); in gen_prepare_cc()
1089 cc = (CCPrepare) { .cond = TCG_COND_LEU, .reg = s->cc_srcT, in gen_prepare_cc()
1098 tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size | MO_SIGN); in gen_prepare_cc()
1100 cc = (CCPrepare) { .cond = cond, .reg = s->cc_srcT, in gen_prepare_cc()
1111 size = s->cc_op - CC_OP_LOGICB; in gen_prepare_cc()
1136 cc = gen_prepare_eflags_o(s, reg); in gen_prepare_cc()
1139 cc = gen_prepare_eflags_c(s, reg); in gen_prepare_cc()
1142 cc = gen_prepare_eflags_z(s, reg); in gen_prepare_cc()
1145 gen_compute_eflags(s); in gen_prepare_cc()
1150 cc = gen_prepare_eflags_s(s, reg); in gen_prepare_cc()
1153 cc = gen_prepare_eflags_p(s, reg); in gen_prepare_cc()
1156 gen_compute_eflags(s); in gen_prepare_cc()
1166 gen_compute_eflags(s); in gen_prepare_cc()
1184 static void gen_neg_setcc(DisasContext *s, int b, TCGv reg) in gen_neg_setcc() argument
1186 CCPrepare cc = gen_prepare_cc(s, b, reg); in gen_neg_setcc()
1204 static void gen_setcc(DisasContext *s, int b, TCGv reg) in gen_setcc() argument
1206 CCPrepare cc = gen_prepare_cc(s, b, reg); in gen_setcc()
1224 static inline void gen_compute_eflags_c(DisasContext *s, TCGv reg) in gen_compute_eflags_c() argument
1226 gen_setcc(s, JCC_B << 1, reg); in gen_compute_eflags_c()
1231 static inline void gen_jcc_noeob(DisasContext *s, int b, TCGLabel *l1) in gen_jcc_noeob() argument
1233 CCPrepare cc = gen_prepare_cc(s, b, NULL); in gen_jcc_noeob()
1246 static inline void gen_jcc(DisasContext *s, int b, TCGLabel *l1) in gen_jcc() argument
1248 CCPrepare cc = gen_prepare_cc(s, b, NULL); in gen_jcc()
1252 * the cc_op to CC_OP_EFLAGS (because it's CC_OP_DYNAMIC or because in gen_jcc()
1253 * it's cheaper to just compute the flags)! in gen_jcc()
1255 gen_update_cc_op(s); in gen_jcc()
1263 static void gen_stos(DisasContext *s, MemOp ot, TCGv dshift) in gen_stos() argument
1265 gen_string_movl_A0_EDI(s); in gen_stos()
1266 gen_op_st_v(s, ot, s->T0, s->A0); in gen_stos()
1267 gen_op_add_reg(s, s->aflag, R_EDI, dshift); in gen_stos()
1270 static void gen_lods(DisasContext *s, MemOp ot, TCGv dshift) in gen_lods() argument
1272 gen_string_movl_A0_ESI(s); in gen_lods()
1273 gen_op_ld_v(s, ot, s->T0, s->A0); in gen_lods()
1274 gen_op_mov_reg_v(s, ot, R_EAX, s->T0); in gen_lods()
1275 gen_op_add_reg(s, s->aflag, R_ESI, dshift); in gen_lods()
1278 static void gen_scas(DisasContext *s, MemOp ot, TCGv dshift) in gen_scas() argument
1280 gen_string_movl_A0_EDI(s); in gen_scas()
1281 gen_op_ld_v(s, ot, s->T1, s->A0); in gen_scas()
1282 tcg_gen_mov_tl(cpu_cc_src, s->T1); in gen_scas()
1283 tcg_gen_mov_tl(s->cc_srcT, s->T0); in gen_scas()
1284 tcg_gen_sub_tl(cpu_cc_dst, s->T0, s->T1); in gen_scas()
1285 set_cc_op(s, CC_OP_SUBB + ot); in gen_scas()
1287 gen_op_add_reg(s, s->aflag, R_EDI, dshift); in gen_scas()
1290 static void gen_cmps(DisasContext *s, MemOp ot, TCGv dshift) in gen_cmps() argument
1292 gen_string_movl_A0_EDI(s); in gen_cmps()
1293 gen_op_ld_v(s, ot, s->T1, s->A0); in gen_cmps()
1294 gen_string_movl_A0_ESI(s); in gen_cmps()
1295 gen_op_ld_v(s, ot, s->T0, s->A0); in gen_cmps()
1296 tcg_gen_mov_tl(cpu_cc_src, s->T1); in gen_cmps()
1297 tcg_gen_mov_tl(s->cc_srcT, s->T0); in gen_cmps()
1298 tcg_gen_sub_tl(cpu_cc_dst, s->T0, s->T1); in gen_cmps()
1299 set_cc_op(s, CC_OP_SUBB + ot); in gen_cmps()
1301 gen_op_add_reg(s, s->aflag, R_ESI, dshift); in gen_cmps()
1302 gen_op_add_reg(s, s->aflag, R_EDI, dshift); in gen_cmps()
1305 static void gen_bpt_io(DisasContext *s, TCGv_i32 t_port, int ot) in gen_bpt_io() argument
1307 if (s->flags & HF_IOBPT_MASK) { in gen_bpt_io()
1313 TCGv t_next = eip_next_tl(s); in gen_bpt_io()
1319 static void gen_ins(DisasContext *s, MemOp ot, TCGv dshift) in gen_ins() argument
1323 gen_string_movl_A0_EDI(s); in gen_ins()
1326 tcg_gen_movi_tl(s->T0, 0); in gen_ins()
1327 gen_op_st_v(s, ot, s->T0, s->A0); in gen_ins()
1330 gen_helper_in_func(ot, s->T0, port); in gen_ins()
1331 gen_op_st_v(s, ot, s->T0, s->A0); in gen_ins()
1332 gen_op_add_reg(s, s->aflag, R_EDI, dshift); in gen_ins()
1333 gen_bpt_io(s, port, ot); in gen_ins()
1336 static void gen_outs(DisasContext *s, MemOp ot, TCGv dshift) in gen_outs() argument
1341 gen_string_movl_A0_ESI(s); in gen_outs()
1342 gen_op_ld_v(s, ot, s->T0, s->A0); in gen_outs()
1346 tcg_gen_trunc_tl_i32(value, s->T0); in gen_outs()
1348 gen_op_add_reg(s, s->aflag, R_ESI, dshift); in gen_outs()
1349 gen_bpt_io(s, port, ot); in gen_outs()
1354 static void do_gen_rep(DisasContext *s, MemOp ot, TCGv dshift, in do_gen_rep() argument
1355 void (*fn)(DisasContext *s, MemOp ot, TCGv dshift), in do_gen_rep() argument
1362 target_ulong cx_mask = MAKE_64BIT_MASK(0, 8 << s->aflag); in do_gen_rep()
1372 (!(tb_cflags(s->base.tb) & (CF_USE_ICOUNT | CF_SINGLE_STEP)) in do_gen_rep()
1373 && !(s->flags & (HF_TF_MASK | HF_INHIBIT_IRQ_MASK))); in do_gen_rep()
1374 bool had_rf = s->flags & HF_RF_MASK; in do_gen_rep()
1381 s->flags &= ~HF_RF_MASK; in do_gen_rep()
1389 * It's not a problem to do this even for instructions that do not in do_gen_rep()
1392 gen_update_cc_op(s); in do_gen_rep()
1393 tcg_set_insn_start_param(s->base.insn_start, 1, CC_OP_DYNAMIC); in do_gen_rep()
1405 if (s->aflag == MO_32) { in do_gen_rep()
1420 fn(s, ot, dshift); in do_gen_rep()
1422 gen_update_cc_op(s); in do_gen_rep()
1426 int nz = (s->prefix & PREFIX_REPNZ) ? 1 : 0; in do_gen_rep()
1427 gen_jcc_noeob(s, (JCC_Z << 1) | (nz ^ 1), done); in do_gen_rep()
1429 assert(!s->cc_op_dirty); in do_gen_rep()
1444 gen_set_eflags(s, RF_MASK); in do_gen_rep()
1448 gen_jmp_rel_csize(s, -cur_insn_len(s), 0); in do_gen_rep()
1456 set_cc_op(s, CC_OP_DYNAMIC); in do_gen_rep()
1457 fn(s, ot, dshift); in do_gen_rep()
1459 gen_update_cc_op(s); in do_gen_rep()
1464 set_cc_op(s, CC_OP_DYNAMIC); in do_gen_rep()
1466 gen_reset_eflags(s, RF_MASK); in do_gen_rep()
1468 gen_jmp_rel_csize(s, 0, 1); in do_gen_rep()
1471 static void do_gen_string(DisasContext *s, MemOp ot, in do_gen_string() argument
1472 void (*fn)(DisasContext *s, MemOp ot, TCGv dshift), in do_gen_string() argument
1479 if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { in do_gen_string()
1480 do_gen_rep(s, ot, dshift, fn, is_repz_nz); in do_gen_string()
1482 fn(s, ot, dshift); in do_gen_string()
1486 static void gen_repz(DisasContext *s, MemOp ot, in gen_repz() argument
1487 void (*fn)(DisasContext *s, MemOp ot, TCGv dshift)) in gen_repz() argument
1489 do_gen_string(s, ot, fn, false); in gen_repz()
1492 static void gen_repz_nz(DisasContext *s, MemOp ot, in gen_repz_nz() argument
1493 void (*fn)(DisasContext *s, MemOp ot, TCGv dshift)) in gen_repz_nz() argument
1495 do_gen_string(s, ot, fn, true); in gen_repz_nz()
1554 static void gen_exception(DisasContext *s, int trapno) in gen_exception() argument
1556 gen_update_cc_op(s); in gen_exception()
1557 gen_update_eip_cur(s); in gen_exception()
1559 s->base.is_jmp = DISAS_NORETURN; in gen_exception()
1564 static void gen_illegal_opcode(DisasContext *s) in gen_illegal_opcode() argument
1566 gen_exception(s, EXCP06_ILLOP); in gen_illegal_opcode()
1570 static void gen_exception_gpf(DisasContext *s) in gen_exception_gpf() argument
1572 gen_exception(s, EXCP0D_GPF); in gen_exception_gpf()
1576 static bool check_cpl0(DisasContext *s) in check_cpl0() argument
1578 if (CPL(s) == 0) { in check_cpl0()
1581 gen_exception_gpf(s); in check_cpl0()
1586 static TCGv gen_shiftd_rm_T1(DisasContext *s, MemOp ot, in gen_shiftd_rm_T1() argument
1600 tcg_gen_deposit_tl(tmp, s->T0, s->T1, 16, 16); in gen_shiftd_rm_T1()
1601 tcg_gen_mov_tl(s->T1, s->T0); in gen_shiftd_rm_T1()
1602 tcg_gen_mov_tl(s->T0, tmp); in gen_shiftd_rm_T1()
1604 tcg_gen_deposit_tl(s->T1, s->T0, s->T1, 16, 16); in gen_shiftd_rm_T1()
1615 tcg_gen_concat_tl_i64(s->T0, s->T0, s->T1); in gen_shiftd_rm_T1()
1616 tcg_gen_shr_i64(cc_src, s->T0, tmp); in gen_shiftd_rm_T1()
1617 tcg_gen_shr_i64(s->T0, s->T0, count); in gen_shiftd_rm_T1()
1619 tcg_gen_concat_tl_i64(s->T0, s->T1, s->T0); in gen_shiftd_rm_T1()
1620 tcg_gen_shl_i64(cc_src, s->T0, tmp); in gen_shiftd_rm_T1()
1621 tcg_gen_shl_i64(s->T0, s->T0, count); in gen_shiftd_rm_T1()
1623 tcg_gen_shri_i64(s->T0, s->T0, 32); in gen_shiftd_rm_T1()
1631 tcg_gen_shr_tl(cc_src, s->T0, tmp); in gen_shiftd_rm_T1()
1635 tcg_gen_shr_tl(s->T0, s->T0, count); in gen_shiftd_rm_T1()
1636 tcg_gen_shl_tl(s->T1, s->T1, hishift); in gen_shiftd_rm_T1()
1638 tcg_gen_shl_tl(cc_src, s->T0, tmp); in gen_shiftd_rm_T1()
1642 tcg_gen_shl_tl(s->T0, s->T0, count); in gen_shiftd_rm_T1()
1643 tcg_gen_shr_tl(s->T1, s->T1, hishift); in gen_shiftd_rm_T1()
1647 tcg_gen_shri_tl(tmp, s->T1, 1); in gen_shiftd_rm_T1()
1651 tcg_gen_movcond_tl(TCG_COND_EQ, s->T1, in gen_shiftd_rm_T1()
1653 tcg_constant_tl(0), s->T1); in gen_shiftd_rm_T1()
1654 tcg_gen_or_tl(s->T0, s->T0, s->T1); in gen_shiftd_rm_T1()
1663 static uint64_t advance_pc(CPUX86State *env, DisasContext *s, int num_bytes) in advance_pc() argument
1665 uint64_t pc = s->pc; in advance_pc()
1668 if (s->base.num_insns > 1 && in advance_pc()
1669 !translator_is_same_page(&s->base, s->pc + num_bytes - 1)) { in advance_pc()
1670 siglongjmp(s->jmpbuf, 2); in advance_pc()
1673 s->pc += num_bytes; in advance_pc()
1674 if (unlikely(cur_insn_len(s) > X86_MAX_INSN_LENGTH)) { in advance_pc()
1675 /* If the instruction's 16th byte is on a different page than the 1st, a in advance_pc()
1680 if (((s->pc - 1) ^ (pc - 1)) & TARGET_PAGE_MASK) { in advance_pc()
1681 (void)translator_ldub(env, &s->base, in advance_pc()
1682 (s->pc - 1) & TARGET_PAGE_MASK); in advance_pc()
1684 siglongjmp(s->jmpbuf, 1); in advance_pc()
1690 static inline uint8_t x86_ldub_code(CPUX86State *env, DisasContext *s) in x86_ldub_code() argument
1692 return translator_ldub(env, &s->base, advance_pc(env, s, 1)); in x86_ldub_code()
1695 static inline uint16_t x86_lduw_code(CPUX86State *env, DisasContext *s) in x86_lduw_code() argument
1697 return translator_lduw(env, &s->base, advance_pc(env, s, 2)); in x86_lduw_code()
1700 static inline uint32_t x86_ldl_code(CPUX86State *env, DisasContext *s) in x86_ldl_code() argument
1702 return translator_ldl(env, &s->base, advance_pc(env, s, 4)); in x86_ldl_code()
1706 static inline uint64_t x86_ldq_code(CPUX86State *env, DisasContext *s) in x86_ldq_code() argument
1708 return translator_ldq(env, &s->base, advance_pc(env, s, 8)); in x86_ldq_code()
1714 static AddressParts gen_lea_modrm_0(CPUX86State *env, DisasContext *s, in gen_lea_modrm_0() argument
1728 base = rm | REX_B(s); in gen_lea_modrm_0()
1736 switch (s->aflag) { in gen_lea_modrm_0()
1741 int code = x86_ldub_code(env, s); in gen_lea_modrm_0()
1743 index = ((code >> 3) & 7) | REX_X(s); in gen_lea_modrm_0()
1747 base = (code & 7) | REX_B(s); in gen_lea_modrm_0()
1755 disp = (int32_t)x86_ldl_code(env, s); in gen_lea_modrm_0()
1756 if (CODE64(s) && !havesib) { in gen_lea_modrm_0()
1758 disp += s->pc + s->rip_offset; in gen_lea_modrm_0()
1763 disp = (int8_t)x86_ldub_code(env, s); in gen_lea_modrm_0()
1767 disp = (int32_t)x86_ldl_code(env, s); in gen_lea_modrm_0()
1772 if (base == R_ESP && s->popl_esp_hack) { in gen_lea_modrm_0()
1773 disp += s->popl_esp_hack; in gen_lea_modrm_0()
1784 disp = x86_lduw_code(env, s); in gen_lea_modrm_0()
1788 disp = (int8_t)x86_ldub_code(env, s); in gen_lea_modrm_0()
1790 disp = (int16_t)x86_lduw_code(env, s); in gen_lea_modrm_0()
1838 static TCGv gen_lea_modrm_1(DisasContext *s, AddressParts a, bool is_vsib) in gen_lea_modrm_1() argument
1846 tcg_gen_shli_tl(s->A0, cpu_regs[a.index], a.scale); in gen_lea_modrm_1()
1847 ea = s->A0; in gen_lea_modrm_1()
1850 tcg_gen_add_tl(s->A0, ea, cpu_regs[a.base]); in gen_lea_modrm_1()
1851 ea = s->A0; in gen_lea_modrm_1()
1857 if (tb_cflags(s->base.tb) & CF_PCREL && a.base == -2) { in gen_lea_modrm_1()
1859 tcg_gen_addi_tl(s->A0, cpu_eip, a.disp - s->pc_save); in gen_lea_modrm_1()
1861 tcg_gen_movi_tl(s->A0, a.disp); in gen_lea_modrm_1()
1863 ea = s->A0; in gen_lea_modrm_1()
1865 tcg_gen_addi_tl(s->A0, ea, a.disp); in gen_lea_modrm_1()
1866 ea = s->A0; in gen_lea_modrm_1()
1873 static void gen_bndck(DisasContext *s, X86DecodedInsn *decode, in gen_bndck() argument
1876 TCGv ea = gen_lea_modrm_1(s, decode->mem, false); in gen_bndck()
1881 if (!CODE64(s)) { in gen_bndck()
1890 static void gen_ld_modrm(DisasContext *s, X86DecodedInsn *decode, MemOp ot) in gen_ld_modrm() argument
1892 int modrm = s->modrm; in gen_ld_modrm()
1896 rm = (modrm & 7) | REX_B(s); in gen_ld_modrm()
1898 gen_op_mov_v_reg(s, ot, s->T0, rm); in gen_ld_modrm()
1900 gen_lea_modrm(s, decode); in gen_ld_modrm()
1901 gen_op_ld_v(s, ot, s->T0, s->A0); in gen_ld_modrm()
1906 static void gen_st_modrm(DisasContext *s, X86DecodedInsn *decode, MemOp ot) in gen_st_modrm() argument
1908 int modrm = s->modrm; in gen_st_modrm()
1912 rm = (modrm & 7) | REX_B(s); in gen_st_modrm()
1914 gen_op_mov_reg_v(s, ot, rm, s->T0); in gen_st_modrm()
1916 gen_lea_modrm(s, decode); in gen_st_modrm()
1917 gen_op_st_v(s, ot, s->T0, s->A0); in gen_st_modrm()
1921 static target_ulong insn_get_addr(CPUX86State *env, DisasContext *s, MemOp ot) in insn_get_addr() argument
1927 ret = x86_ldub_code(env, s); in insn_get_addr()
1930 ret = x86_lduw_code(env, s); in insn_get_addr()
1933 ret = x86_ldl_code(env, s); in insn_get_addr()
1937 ret = x86_ldq_code(env, s); in insn_get_addr()
1946 static inline uint32_t insn_get(CPUX86State *env, DisasContext *s, MemOp ot) in insn_get() argument
1952 ret = x86_ldub_code(env, s); in insn_get()
1955 ret = x86_lduw_code(env, s); in insn_get()
1961 ret = x86_ldl_code(env, s); in insn_get()
1969 static target_long insn_get_signed(CPUX86State *env, DisasContext *s, MemOp ot) in insn_get_signed() argument
1975 ret = (int8_t) x86_ldub_code(env, s); in insn_get_signed()
1978 ret = (int16_t) x86_lduw_code(env, s); in insn_get_signed()
1981 ret = (int32_t) x86_ldl_code(env, s); in insn_get_signed()
1985 ret = x86_ldq_code(env, s); in insn_get_signed()
1994 static void gen_conditional_jump_labels(DisasContext *s, target_long diff, in gen_conditional_jump_labels() argument
2000 gen_jmp_rel_csize(s, 0, 1); in gen_conditional_jump_labels()
2003 gen_jmp_rel(s, s->dflag, diff, 0); in gen_conditional_jump_labels()
2006 static void gen_cmovcc(DisasContext *s, int b, TCGv dest, TCGv src) in gen_cmovcc() argument
2008 CCPrepare cc = gen_prepare_cc(s, b, NULL); in gen_cmovcc()
2017 static void gen_op_movl_seg_real(DisasContext *s, X86Seg seg_reg, TCGv seg) in gen_op_movl_seg_real() argument
2028 static void gen_movl_seg(DisasContext *s, X86Seg seg_reg, TCGv src, bool inhibit_irq) in gen_movl_seg() argument
2030 if (PE(s) && !VM86(s)) { in gen_movl_seg()
2040 if (seg_reg == R_SS || (CODE32(s) && seg_reg < R_FS)) { in gen_movl_seg()
2041 s->base.is_jmp = DISAS_EOB_NEXT; in gen_movl_seg()
2044 gen_op_movl_seg_real(s, seg_reg, src); in gen_movl_seg()
2052 * This is the last instruction, so it's okay to overwrite in gen_movl_seg()
2059 s->base.is_jmp = DISAS_EOB_INHIBIT_IRQ; in gen_movl_seg()
2060 s->flags &= ~HF_TF_MASK; in gen_movl_seg()
2064 static void gen_far_call(DisasContext *s) in gen_far_call() argument
2067 tcg_gen_trunc_tl_i32(new_cs, s->T1); in gen_far_call()
2068 if (PE(s) && !VM86(s)) { in gen_far_call()
2069 gen_helper_lcall_protected(tcg_env, new_cs, s->T0, in gen_far_call()
2070 tcg_constant_i32(s->dflag - 1), in gen_far_call()
2071 eip_next_tl(s)); in gen_far_call()
2074 tcg_gen_trunc_tl_i32(new_eip, s->T0); in gen_far_call()
2076 tcg_constant_i32(s->dflag - 1), in gen_far_call()
2077 eip_next_i32(s)); in gen_far_call()
2079 s->base.is_jmp = DISAS_JUMP; in gen_far_call()
2082 static void gen_far_jmp(DisasContext *s) in gen_far_jmp() argument
2084 if (PE(s) && !VM86(s)) { in gen_far_jmp()
2086 tcg_gen_trunc_tl_i32(new_cs, s->T1); in gen_far_jmp()
2087 gen_helper_ljmp_protected(tcg_env, new_cs, s->T0, in gen_far_jmp()
2088 eip_next_tl(s)); in gen_far_jmp()
2090 gen_op_movl_seg_real(s, R_CS, s->T1); in gen_far_jmp()
2091 gen_op_jmp_v(s, s->T0); in gen_far_jmp()
2093 s->base.is_jmp = DISAS_JUMP; in gen_far_jmp()
2096 static void gen_svm_check_intercept(DisasContext *s, uint32_t type) in gen_svm_check_intercept() argument
2099 if (likely(!GUEST(s))) { in gen_svm_check_intercept()
2105 static inline void gen_stack_update(DisasContext *s, int addend) in gen_stack_update() argument
2107 gen_op_add_reg_im(s, mo_stacksize(s), R_ESP, addend); in gen_stack_update()
2110 static void gen_lea_ss_ofs(DisasContext *s, TCGv dest, TCGv src, target_ulong offset) in gen_lea_ss_ofs() argument
2116 gen_lea_v_seg_dest(s, mo_stacksize(s), dest, src, R_SS, -1); in gen_lea_ss_ofs()
2120 static void gen_push_v(DisasContext *s, TCGv val) in gen_push_v() argument
2122 MemOp d_ot = mo_pushpop(s, s->dflag); in gen_push_v()
2123 MemOp a_ot = mo_stacksize(s); in gen_push_v()
2130 gen_lea_ss_ofs(s, s->A0, new_esp, 0); in gen_push_v()
2131 gen_op_st_v(s, d_ot, val, s->A0); in gen_push_v()
2132 gen_op_mov_reg_v(s, a_ot, R_ESP, new_esp); in gen_push_v()
2136 static MemOp gen_pop_T0(DisasContext *s) in gen_pop_T0() argument
2138 MemOp d_ot = mo_pushpop(s, s->dflag); in gen_pop_T0()
2140 gen_lea_ss_ofs(s, s->T0, cpu_regs[R_ESP], 0); in gen_pop_T0()
2141 gen_op_ld_v(s, d_ot, s->T0, s->T0); in gen_pop_T0()
2146 static inline void gen_pop_update(DisasContext *s, MemOp ot) in gen_pop_update() argument
2148 gen_stack_update(s, 1 << ot); in gen_pop_update()
2151 static void gen_pusha(DisasContext *s) in gen_pusha() argument
2153 MemOp d_ot = s->dflag; in gen_pusha()
2158 gen_lea_ss_ofs(s, s->A0, cpu_regs[R_ESP], (i - 8) * size); in gen_pusha()
2159 gen_op_st_v(s, d_ot, cpu_regs[7 - i], s->A0); in gen_pusha()
2162 gen_stack_update(s, -8 * size); in gen_pusha()
2165 static void gen_popa(DisasContext *s) in gen_popa() argument
2167 MemOp d_ot = s->dflag; in gen_popa()
2176 gen_lea_ss_ofs(s, s->A0, cpu_regs[R_ESP], i * size); in gen_popa()
2177 gen_op_ld_v(s, d_ot, s->T0, s->A0); in gen_popa()
2178 gen_op_mov_reg_v(s, d_ot, 7 - i, s->T0); in gen_popa()
2181 gen_stack_update(s, 8 * size); in gen_popa()
2184 static void gen_enter(DisasContext *s, int esp_addend, int level) in gen_enter() argument
2186 MemOp d_ot = mo_pushpop(s, s->dflag); in gen_enter()
2187 MemOp a_ot = mo_stacksize(s); in gen_enter()
2191 tcg_gen_subi_tl(s->T1, cpu_regs[R_ESP], size); in gen_enter()
2192 gen_lea_ss_ofs(s, s->A0, s->T1, 0); in gen_enter()
2193 gen_op_st_v(s, d_ot, cpu_regs[R_EBP], s->A0); in gen_enter()
2203 gen_lea_ss_ofs(s, s->A0, cpu_regs[R_EBP], -size * i); in gen_enter()
2204 gen_op_ld_v(s, d_ot, fp, s->A0); in gen_enter()
2206 gen_lea_ss_ofs(s, s->A0, s->T1, -size * i); in gen_enter()
2207 gen_op_st_v(s, d_ot, fp, s->A0); in gen_enter()
2212 gen_lea_ss_ofs(s, s->A0, s->T1, -size * level); in gen_enter()
2213 gen_op_st_v(s, d_ot, s->T1, s->A0); in gen_enter()
2217 gen_op_mov_reg_v(s, d_ot, R_EBP, s->T1); in gen_enter()
2220 tcg_gen_subi_tl(s->T1, s->T1, esp_addend + size * level); in gen_enter()
2221 gen_op_mov_reg_v(s, a_ot, R_ESP, s->T1); in gen_enter()
2224 static void gen_leave(DisasContext *s) in gen_leave() argument
2226 MemOp d_ot = mo_pushpop(s, s->dflag); in gen_leave()
2227 MemOp a_ot = mo_stacksize(s); in gen_leave()
2229 gen_lea_ss_ofs(s, s->A0, cpu_regs[R_EBP], 0); in gen_leave()
2230 gen_op_ld_v(s, d_ot, s->T0, s->A0); in gen_leave()
2232 tcg_gen_addi_tl(s->T1, cpu_regs[R_EBP], 1 << d_ot); in gen_leave()
2234 gen_op_mov_reg_v(s, d_ot, R_EBP, s->T0); in gen_leave()
2235 gen_op_mov_reg_v(s, a_ot, R_ESP, s->T1); in gen_leave()
2241 static void gen_unknown_opcode(CPUX86State *env, DisasContext *s) in gen_unknown_opcode() argument
2243 gen_illegal_opcode(s); in gen_unknown_opcode()
2248 target_ulong pc = s->base.pc_next, end = s->pc; in gen_unknown_opcode()
2252 fprintf(logfile, " %02x", translator_ldub(env, &s->base, pc)); in gen_unknown_opcode()
2262 static void gen_interrupt(DisasContext *s, uint8_t intno) in gen_interrupt() argument
2264 gen_update_cc_op(s); in gen_interrupt()
2265 gen_update_eip_cur(s); in gen_interrupt()
2267 cur_insn_len_i32(s)); in gen_interrupt()
2268 s->base.is_jmp = DISAS_NORETURN; in gen_interrupt()
2272 static void gen_bnd_jmp(DisasContext *s) in gen_bnd_jmp() argument
2277 if ((s->prefix & PREFIX_REPNZ) == 0 in gen_bnd_jmp()
2278 && (s->flags & HF_MPX_EN_MASK) != 0 in gen_bnd_jmp()
2279 && (s->flags & HF_MPX_IU_MASK) != 0) { in gen_bnd_jmp()
2290 gen_eob(DisasContext *s, int mode) in gen_eob() argument
2294 gen_update_cc_op(s); in gen_eob()
2298 if (s->flags & HF_INHIBIT_IRQ_MASK) { in gen_eob()
2299 gen_reset_hflag(s, HF_INHIBIT_IRQ_MASK); in gen_eob()
2302 gen_set_hflag(s, HF_INHIBIT_IRQ_MASK); in gen_eob()
2305 if (s->flags & HF_RF_MASK) { in gen_eob()
2306 gen_reset_eflags(s, RF_MASK); in gen_eob()
2311 } else if (s->flags & HF_TF_MASK) { in gen_eob()
2321 s->base.is_jmp = DISAS_NORETURN; in gen_eob()
2325 static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num) in gen_jmp_rel() argument
2327 bool use_goto_tb = s->jmp_opt; in gen_jmp_rel()
2329 target_ulong new_pc = s->pc + diff; in gen_jmp_rel()
2330 target_ulong new_eip = new_pc - s->cs_base; in gen_jmp_rel()
2332 assert(!s->cc_op_dirty); in gen_jmp_rel()
2335 if (!CODE64(s)) { in gen_jmp_rel()
2338 if (tb_cflags(s->base.tb) & CF_PCREL && CODE32(s)) { in gen_jmp_rel()
2347 if (tb_cflags(s->base.tb) & CF_PCREL) { in gen_jmp_rel()
2348 tcg_gen_addi_tl(cpu_eip, cpu_eip, new_pc - s->pc_save); in gen_jmp_rel()
2354 if (!use_goto_tb || !translator_is_same_page(&s->base, new_pc)) { in gen_jmp_rel()
2358 } else if (!CODE64(s)) { in gen_jmp_rel()
2359 new_pc = (uint32_t)(new_eip + s->cs_base); in gen_jmp_rel()
2362 if (use_goto_tb && translator_use_goto_tb(&s->base, new_pc)) { in gen_jmp_rel()
2365 if (!(tb_cflags(s->base.tb) & CF_PCREL)) { in gen_jmp_rel()
2368 tcg_gen_exit_tb(s->base.tb, tb_num); in gen_jmp_rel()
2369 s->base.is_jmp = DISAS_NORETURN; in gen_jmp_rel()
2371 if (!(tb_cflags(s->base.tb) & CF_PCREL)) { in gen_jmp_rel()
2374 if (s->jmp_opt) { in gen_jmp_rel()
2375 gen_eob(s, DISAS_JUMP); /* jump to another page */ in gen_jmp_rel()
2377 gen_eob(s, DISAS_EOB_ONLY); /* exit to main loop */ in gen_jmp_rel()
2383 static void gen_jmp_rel_csize(DisasContext *s, int diff, int tb_num) in gen_jmp_rel_csize() argument
2386 gen_jmp_rel(s, CODE32(s) ? MO_32 : MO_16, diff, tb_num); in gen_jmp_rel_csize()
2389 static inline void gen_ldq_env_A0(DisasContext *s, int offset) in gen_ldq_env_A0() argument
2391 tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, s->mem_index, MO_LEUQ); in gen_ldq_env_A0()
2392 tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset); in gen_ldq_env_A0()
2395 static inline void gen_stq_env_A0(DisasContext *s, int offset) in gen_stq_env_A0() argument
2397 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset); in gen_stq_env_A0()
2398 tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, s->mem_index, MO_LEUQ); in gen_stq_env_A0()
2401 static inline void gen_ldo_env_A0(DisasContext *s, int offset, bool align) in gen_ldo_env_A0() argument
2403 MemOp atom = (s->cpuid_ext_features & CPUID_EXT_AVX in gen_ldo_env_A0()
2406 int mem_index = s->mem_index; in gen_ldo_env_A0()
2409 tcg_gen_qemu_ld_i128(t, s->A0, mem_index, mop); in gen_ldo_env_A0()
2413 static inline void gen_sto_env_A0(DisasContext *s, int offset, bool align) in gen_sto_env_A0() argument
2415 MemOp atom = (s->cpuid_ext_features & CPUID_EXT_AVX in gen_sto_env_A0()
2418 int mem_index = s->mem_index; in gen_sto_env_A0()
2422 tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop); in gen_sto_env_A0()
2425 static void gen_ldy_env_A0(DisasContext *s, int offset, bool align) in gen_ldy_env_A0() argument
2428 int mem_index = s->mem_index; in gen_ldy_env_A0()
2433 tcg_gen_qemu_ld_i128(t0, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0)); in gen_ldy_env_A0()
2434 tcg_gen_addi_tl(a0_hi, s->A0, 16); in gen_ldy_env_A0()
2441 static void gen_sty_env_A0(DisasContext *s, int offset, bool align) in gen_sty_env_A0() argument
2444 int mem_index = s->mem_index; in gen_sty_env_A0()
2449 tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0)); in gen_sty_env_A0()
2450 tcg_gen_addi_tl(a0_hi, s->A0, 16); in gen_sty_env_A0()
2457 static void gen_x87(DisasContext *s, X86DecodedInsn *decode) in gen_x87() argument
2461 int modrm = s->modrm; in gen_x87()
2464 if (s->flags & (HF_EM_MASK | HF_TS_MASK)) { in gen_x87()
2467 gen_exception(s, EXCP07_PREX); in gen_x87()
2475 TCGv ea = gen_lea_modrm_1(s, decode->mem, false); in gen_x87()
2480 gen_lea_v_seg(s, ea, decode->mem.def_seg, s->override); in gen_x87()
2493 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2494 s->mem_index, MO_LEUL); in gen_x87()
2495 gen_helper_flds_FT0(tcg_env, s->tmp2_i32); in gen_x87()
2498 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2499 s->mem_index, MO_LEUL); in gen_x87()
2500 gen_helper_fildl_FT0(tcg_env, s->tmp2_i32); in gen_x87()
2503 tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, in gen_x87()
2504 s->mem_index, MO_LEUQ); in gen_x87()
2505 gen_helper_fldl_FT0(tcg_env, s->tmp1_i64); in gen_x87()
2509 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2510 s->mem_index, MO_LESW); in gen_x87()
2511 gen_helper_fildl_FT0(tcg_env, s->tmp2_i32); in gen_x87()
2532 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2533 s->mem_index, MO_LEUL); in gen_x87()
2534 gen_helper_flds_ST0(tcg_env, s->tmp2_i32); in gen_x87()
2537 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2538 s->mem_index, MO_LEUL); in gen_x87()
2539 gen_helper_fildl_ST0(tcg_env, s->tmp2_i32); in gen_x87()
2542 tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, in gen_x87()
2543 s->mem_index, MO_LEUQ); in gen_x87()
2544 gen_helper_fldl_ST0(tcg_env, s->tmp1_i64); in gen_x87()
2548 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2549 s->mem_index, MO_LESW); in gen_x87()
2550 gen_helper_fildl_ST0(tcg_env, s->tmp2_i32); in gen_x87()
2558 gen_helper_fisttl_ST0(s->tmp2_i32, tcg_env); in gen_x87()
2559 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2560 s->mem_index, MO_LEUL); in gen_x87()
2563 gen_helper_fisttll_ST0(s->tmp1_i64, tcg_env); in gen_x87()
2564 tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, in gen_x87()
2565 s->mem_index, MO_LEUQ); in gen_x87()
2569 gen_helper_fistt_ST0(s->tmp2_i32, tcg_env); in gen_x87()
2570 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2571 s->mem_index, MO_LEUW); in gen_x87()
2579 gen_helper_fsts_ST0(s->tmp2_i32, tcg_env); in gen_x87()
2580 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2581 s->mem_index, MO_LEUL); in gen_x87()
2584 gen_helper_fistl_ST0(s->tmp2_i32, tcg_env); in gen_x87()
2585 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2586 s->mem_index, MO_LEUL); in gen_x87()
2589 gen_helper_fstl_ST0(s->tmp1_i64, tcg_env); in gen_x87()
2590 tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, in gen_x87()
2591 s->mem_index, MO_LEUQ); in gen_x87()
2595 gen_helper_fist_ST0(s->tmp2_i32, tcg_env); in gen_x87()
2596 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2597 s->mem_index, MO_LEUW); in gen_x87()
2607 gen_helper_fldenv(tcg_env, s->A0, in gen_x87()
2608 tcg_constant_i32(s->dflag - 1)); in gen_x87()
2612 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, in gen_x87()
2613 s->mem_index, MO_LEUW); in gen_x87()
2614 gen_helper_fldcw(tcg_env, s->tmp2_i32); in gen_x87()
2618 gen_helper_fstenv(tcg_env, s->A0, in gen_x87()
2619 tcg_constant_i32(s->dflag - 1)); in gen_x87()
2623 gen_helper_fnstcw(s->tmp2_i32, tcg_env); in gen_x87()
2624 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2625 s->mem_index, MO_LEUW); in gen_x87()
2629 gen_helper_fldt_ST0(tcg_env, s->A0); in gen_x87()
2632 gen_helper_fstt_ST0(tcg_env, s->A0); in gen_x87()
2636 gen_helper_frstor(tcg_env, s->A0, in gen_x87()
2637 tcg_constant_i32(s->dflag - 1)); in gen_x87()
2641 gen_helper_fsave(tcg_env, s->A0, in gen_x87()
2642 tcg_constant_i32(s->dflag - 1)); in gen_x87()
2646 gen_helper_fnstsw(s->tmp2_i32, tcg_env); in gen_x87()
2647 tcg_gen_qemu_st_i32(s->tmp2_i32, s->A0, in gen_x87()
2648 s->mem_index, MO_LEUW); in gen_x87()
2652 gen_helper_fbld_ST0(tcg_env, s->A0); in gen_x87()
2655 gen_helper_fbst_ST0(tcg_env, s->A0); in gen_x87()
2659 tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, in gen_x87()
2660 s->mem_index, MO_LEUQ); in gen_x87()
2661 gen_helper_fildll_ST0(tcg_env, s->tmp1_i64); in gen_x87()
2664 gen_helper_fistll_ST0(s->tmp1_i64, tcg_env); in gen_x87()
2665 tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, in gen_x87()
2666 s->mem_index, MO_LEUQ); in gen_x87()
2674 int last_seg = s->override >= 0 ? s->override : decode->mem.def_seg; in gen_x87()
2676 tcg_gen_ld_i32(s->tmp2_i32, tcg_env, in gen_x87()
2679 tcg_gen_st16_i32(s->tmp2_i32, tcg_env, in gen_x87()
2706 translator_io_start(&s->base); in gen_x87()
2891 if (!(s->cpuid_features & CPUID_CMOV)) { in gen_x87()
2894 gen_update_cc_op(s); in gen_x87()
2897 assume_cc_op(s, CC_OP_EFLAGS); in gen_x87()
2900 if (!(s->cpuid_features & CPUID_CMOV)) { in gen_x87()
2903 gen_update_cc_op(s); in gen_x87()
2906 assume_cc_op(s, CC_OP_EFLAGS); in gen_x87()
2949 gen_helper_fnstsw(s->tmp2_i32, tcg_env); in gen_x87()
2950 tcg_gen_extu_i32_tl(s->T0, s->tmp2_i32); in gen_x87()
2951 gen_op_mov_reg_v(s, MO_16, R_EAX, s->T0); in gen_x87()
2958 if (!(s->cpuid_features & CPUID_CMOV)) { in gen_x87()
2961 gen_update_cc_op(s); in gen_x87()
2965 assume_cc_op(s, CC_OP_EFLAGS); in gen_x87()
2968 if (!(s->cpuid_features & CPUID_CMOV)) { in gen_x87()
2971 gen_update_cc_op(s); in gen_x87()
2975 assume_cc_op(s, CC_OP_EFLAGS); in gen_x87()
2989 if (!(s->cpuid_features & CPUID_CMOV)) { in gen_x87()
2994 gen_jcc_noeob(s, op1, l1); in gen_x87()
3006 tcg_gen_ld_i32(s->tmp2_i32, tcg_env, in gen_x87()
3008 tcg_gen_st16_i32(s->tmp2_i32, tcg_env, in gen_x87()
3010 tcg_gen_st_tl(eip_cur_tl(s), in gen_x87()
3016 gen_illegal_opcode(s); in gen_x87()
3019 static void gen_multi0F(DisasContext *s, X86DecodedInsn *decode) in gen_multi0F() argument
3021 int prefixes = s->prefix; in gen_multi0F()
3022 MemOp dflag = s->dflag; in gen_multi0F()
3024 int modrm = s->modrm; in gen_multi0F()
3035 (s->prefix & PREFIX_REPNZ)) { in gen_multi0F()
3038 if (s->prefix & PREFIX_REPZ) { in gen_multi0F()
3039 if (!(s->cpuid_7_0_ecx_features & CPUID_7_0_ECX_RDPID)) { in gen_multi0F()
3042 gen_helper_rdpid(s->T0, tcg_env); in gen_multi0F()
3043 rm = (modrm & 7) | REX_B(s); in gen_multi0F()
3044 gen_op_mov_reg_v(s, dflag, rm, s->T0); in gen_multi0F()
3047 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_RDSEED)) { in gen_multi0F()
3055 (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) || in gen_multi0F()
3056 !(s->cpuid_ext_features & CPUID_EXT_RDRAND)) { in gen_multi0F()
3060 translator_io_start(&s->base); in gen_multi0F()
3061 gen_helper_rdrand(s->T0, tcg_env); in gen_multi0F()
3062 rm = (modrm & 7) | REX_B(s); in gen_multi0F()
3063 gen_op_mov_reg_v(s, dflag, rm, s->T0); in gen_multi0F()
3064 assume_cc_op(s, CC_OP_EFLAGS); in gen_multi0F()
3077 if (!PE(s) || VM86(s)) in gen_multi0F()
3079 if (s->flags & HF_UMIP_MASK && !check_cpl0(s)) { in gen_multi0F()
3082 gen_svm_check_intercept(s, SVM_EXIT_LDTR_READ); in gen_multi0F()
3083 tcg_gen_ld32u_tl(s->T0, tcg_env, in gen_multi0F()
3086 gen_st_modrm(s, decode, ot); in gen_multi0F()
3089 if (!PE(s) || VM86(s)) in gen_multi0F()
3091 if (check_cpl0(s)) { in gen_multi0F()
3092 gen_svm_check_intercept(s, SVM_EXIT_LDTR_WRITE); in gen_multi0F()
3093 gen_ld_modrm(s, decode, MO_16); in gen_multi0F()
3094 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); in gen_multi0F()
3095 gen_helper_lldt(tcg_env, s->tmp2_i32); in gen_multi0F()
3099 if (!PE(s) || VM86(s)) in gen_multi0F()
3101 if (s->flags & HF_UMIP_MASK && !check_cpl0(s)) { in gen_multi0F()
3104 gen_svm_check_intercept(s, SVM_EXIT_TR_READ); in gen_multi0F()
3105 tcg_gen_ld32u_tl(s->T0, tcg_env, in gen_multi0F()
3108 gen_st_modrm(s, decode, ot); in gen_multi0F()
3111 if (!PE(s) || VM86(s)) in gen_multi0F()
3113 if (check_cpl0(s)) { in gen_multi0F()
3114 gen_svm_check_intercept(s, SVM_EXIT_TR_WRITE); in gen_multi0F()
3115 gen_ld_modrm(s, decode, MO_16); in gen_multi0F()
3116 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); in gen_multi0F()
3117 gen_helper_ltr(tcg_env, s->tmp2_i32); in gen_multi0F()
3122 if (!PE(s) || VM86(s)) in gen_multi0F()
3124 gen_ld_modrm(s, decode, MO_16); in gen_multi0F()
3125 gen_update_cc_op(s); in gen_multi0F()
3127 gen_helper_verr(tcg_env, s->T0); in gen_multi0F()
3129 gen_helper_verw(tcg_env, s->T0); in gen_multi0F()
3131 assume_cc_op(s, CC_OP_EFLAGS); in gen_multi0F()
3141 if (s->flags & HF_UMIP_MASK && !check_cpl0(s)) { in gen_multi0F()
3144 gen_svm_check_intercept(s, SVM_EXIT_GDTR_READ); in gen_multi0F()
3145 gen_lea_modrm(s, decode); in gen_multi0F()
3146 tcg_gen_ld32u_tl(s->T0, in gen_multi0F()
3148 gen_op_st_v(s, MO_16, s->T0, s->A0); in gen_multi0F()
3149 gen_add_A0_im(s, 2); in gen_multi0F()
3150 tcg_gen_ld_tl(s->T0, tcg_env, offsetof(CPUX86State, gdt.base)); in gen_multi0F()
3155 gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0); in gen_multi0F()
3159 if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || CPL(s) != 0) { in gen_multi0F()
3162 gen_update_cc_op(s); in gen_multi0F()
3163 gen_update_eip_cur(s); in gen_multi0F()
3164 gen_lea_v_seg(s, cpu_regs[R_EAX], R_DS, s->override); in gen_multi0F()
3165 gen_helper_monitor(tcg_env, s->A0); in gen_multi0F()
3169 if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || CPL(s) != 0) { in gen_multi0F()
3172 gen_update_cc_op(s); in gen_multi0F()
3173 gen_update_eip_cur(s); in gen_multi0F()
3174 gen_helper_mwait(tcg_env, cur_insn_len_i32(s)); in gen_multi0F()
3175 s->base.is_jmp = DISAS_NORETURN; in gen_multi0F()
3179 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_SMAP) in gen_multi0F()
3180 || CPL(s) != 0) { in gen_multi0F()
3183 gen_reset_eflags(s, AC_MASK); in gen_multi0F()
3184 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3188 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_SMAP) in gen_multi0F()
3189 || CPL(s) != 0) { in gen_multi0F()
3192 gen_set_eflags(s, AC_MASK); in gen_multi0F()
3193 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3197 if (s->flags & HF_UMIP_MASK && !check_cpl0(s)) { in gen_multi0F()
3200 gen_svm_check_intercept(s, SVM_EXIT_IDTR_READ); in gen_multi0F()
3201 gen_lea_modrm(s, decode); in gen_multi0F()
3202 tcg_gen_ld32u_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.limit)); in gen_multi0F()
3203 gen_op_st_v(s, MO_16, s->T0, s->A0); in gen_multi0F()
3204 gen_add_A0_im(s, 2); in gen_multi0F()
3205 tcg_gen_ld_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.base)); in gen_multi0F()
3210 gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0); in gen_multi0F()
3214 if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0 in gen_multi0F()
3215 || (s->prefix & (PREFIX_DATA | PREFIX_REPZ | PREFIX_REPNZ))) { in gen_multi0F()
3218 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); in gen_multi0F()
3219 gen_helper_xgetbv(s->tmp1_i64, tcg_env, s->tmp2_i32); in gen_multi0F()
3220 tcg_gen_extr_i64_tl(cpu_regs[R_EAX], cpu_regs[R_EDX], s->tmp1_i64); in gen_multi0F()
3224 if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0 in gen_multi0F()
3225 || (s->prefix & (PREFIX_DATA | PREFIX_REPZ | PREFIX_REPNZ))) { in gen_multi0F()
3228 gen_svm_check_intercept(s, SVM_EXIT_XSETBV); in gen_multi0F()
3229 if (!check_cpl0(s)) { in gen_multi0F()
3232 tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX], in gen_multi0F()
3234 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); in gen_multi0F()
3235 gen_helper_xsetbv(tcg_env, s->tmp2_i32, s->tmp1_i64); in gen_multi0F()
3237 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3241 if (!SVME(s) || !PE(s)) { in gen_multi0F()
3244 if (!check_cpl0(s)) { in gen_multi0F()
3247 gen_update_cc_op(s); in gen_multi0F()
3248 gen_update_eip_cur(s); in gen_multi0F()
3254 gen_helper_vmrun(tcg_env, tcg_constant_i32(s->aflag - 1), in gen_multi0F()
3255 cur_insn_len_i32(s)); in gen_multi0F()
3257 s->base.is_jmp = DISAS_NORETURN; in gen_multi0F()
3261 if (!SVME(s)) { in gen_multi0F()
3264 gen_update_cc_op(s); in gen_multi0F()
3265 gen_update_eip_cur(s); in gen_multi0F()
3270 if (!SVME(s) || !PE(s)) { in gen_multi0F()
3273 if (!check_cpl0(s)) { in gen_multi0F()
3276 gen_update_cc_op(s); in gen_multi0F()
3277 gen_update_eip_cur(s); in gen_multi0F()
3278 gen_helper_vmload(tcg_env, tcg_constant_i32(s->aflag - 1)); in gen_multi0F()
3282 if (!SVME(s) || !PE(s)) { in gen_multi0F()
3285 if (!check_cpl0(s)) { in gen_multi0F()
3288 gen_update_cc_op(s); in gen_multi0F()
3289 gen_update_eip_cur(s); in gen_multi0F()
3290 gen_helper_vmsave(tcg_env, tcg_constant_i32(s->aflag - 1)); in gen_multi0F()
3294 if ((!SVME(s) && !(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) in gen_multi0F()
3295 || !PE(s)) { in gen_multi0F()
3298 if (!check_cpl0(s)) { in gen_multi0F()
3301 gen_update_cc_op(s); in gen_multi0F()
3303 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3307 if (!SVME(s) || !PE(s)) { in gen_multi0F()
3310 if (!check_cpl0(s)) { in gen_multi0F()
3313 gen_update_cc_op(s); in gen_multi0F()
3314 gen_update_eip_cur(s); in gen_multi0F()
3319 if ((!SVME(s) && !(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) in gen_multi0F()
3320 || !PE(s)) { in gen_multi0F()
3323 gen_svm_check_intercept(s, SVM_EXIT_SKINIT); in gen_multi0F()
3328 if (!SVME(s) || !PE(s)) { in gen_multi0F()
3331 if (!check_cpl0(s)) { in gen_multi0F()
3334 gen_svm_check_intercept(s, SVM_EXIT_INVLPGA); in gen_multi0F()
3335 if (s->aflag == MO_64) { in gen_multi0F()
3336 tcg_gen_mov_tl(s->A0, cpu_regs[R_EAX]); in gen_multi0F()
3338 tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]); in gen_multi0F()
3340 gen_helper_flush_page(tcg_env, s->A0); in gen_multi0F()
3341 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3345 if (!check_cpl0(s)) { in gen_multi0F()
3348 gen_svm_check_intercept(s, SVM_EXIT_GDTR_WRITE); in gen_multi0F()
3349 gen_lea_modrm(s, decode); in gen_multi0F()
3350 gen_op_ld_v(s, MO_16, s->T1, s->A0); in gen_multi0F()
3351 gen_add_A0_im(s, 2); in gen_multi0F()
3352 gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0); in gen_multi0F()
3354 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); in gen_multi0F()
3356 tcg_gen_st_tl(s->T0, tcg_env, offsetof(CPUX86State, gdt.base)); in gen_multi0F()
3357 tcg_gen_st32_tl(s->T1, tcg_env, offsetof(CPUX86State, gdt.limit)); in gen_multi0F()
3361 if (!check_cpl0(s)) { in gen_multi0F()
3364 gen_svm_check_intercept(s, SVM_EXIT_IDTR_WRITE); in gen_multi0F()
3365 gen_lea_modrm(s, decode); in gen_multi0F()
3366 gen_op_ld_v(s, MO_16, s->T1, s->A0); in gen_multi0F()
3367 gen_add_A0_im(s, 2); in gen_multi0F()
3368 gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0); in gen_multi0F()
3370 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); in gen_multi0F()
3372 tcg_gen_st_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.base)); in gen_multi0F()
3373 tcg_gen_st32_tl(s->T1, tcg_env, offsetof(CPUX86State, idt.limit)); in gen_multi0F()
3377 if (s->flags & HF_UMIP_MASK && !check_cpl0(s)) { in gen_multi0F()
3380 gen_svm_check_intercept(s, SVM_EXIT_READ_CR0); in gen_multi0F()
3381 tcg_gen_ld_tl(s->T0, tcg_env, offsetof(CPUX86State, cr[0])); in gen_multi0F()
3388 ot = (mod != 3 ? MO_16 : s->dflag); in gen_multi0F()
3389 gen_st_modrm(s, decode, ot); in gen_multi0F()
3392 if (s->prefix & (PREFIX_DATA | PREFIX_REPZ | PREFIX_REPNZ)) { in gen_multi0F()
3395 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); in gen_multi0F()
3396 gen_helper_rdpkru(s->tmp1_i64, tcg_env, s->tmp2_i32); in gen_multi0F()
3397 tcg_gen_extr_i64_tl(cpu_regs[R_EAX], cpu_regs[R_EDX], s->tmp1_i64); in gen_multi0F()
3400 if (s->prefix & (PREFIX_DATA | PREFIX_REPZ | PREFIX_REPNZ)) { in gen_multi0F()
3403 tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX], in gen_multi0F()
3405 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); in gen_multi0F()
3406 gen_helper_wrpkru(tcg_env, s->tmp2_i32, s->tmp1_i64); in gen_multi0F()
3410 if (!check_cpl0(s)) { in gen_multi0F()
3413 gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0); in gen_multi0F()
3414 gen_ld_modrm(s, decode, MO_16); in gen_multi0F()
3419 tcg_gen_ld_tl(s->T1, tcg_env, offsetof(CPUX86State, cr[0])); in gen_multi0F()
3420 tcg_gen_andi_tl(s->T0, s->T0, 0xf); in gen_multi0F()
3421 tcg_gen_andi_tl(s->T1, s->T1, ~0xe); in gen_multi0F()
3422 tcg_gen_or_tl(s->T0, s->T0, s->T1); in gen_multi0F()
3423 gen_helper_write_crN(tcg_env, tcg_constant_i32(0), s->T0); in gen_multi0F()
3424 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3428 if (!check_cpl0(s)) { in gen_multi0F()
3431 gen_svm_check_intercept(s, SVM_EXIT_INVLPG); in gen_multi0F()
3432 gen_lea_modrm(s, decode); in gen_multi0F()
3433 gen_helper_flush_page(tcg_env, s->A0); in gen_multi0F()
3434 s->base.is_jmp = DISAS_EOB_NEXT; in gen_multi0F()
3439 if (CODE64(s)) { in gen_multi0F()
3440 if (check_cpl0(s)) { in gen_multi0F()
3441 tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]); in gen_multi0F()
3444 tcg_gen_st_tl(s->T0, tcg_env, in gen_multi0F()
3453 if (!(s->cpuid_ext2_features & CPUID_EXT2_RDTSCP)) { in gen_multi0F()
3456 gen_update_cc_op(s); in gen_multi0F()
3457 gen_update_eip_cur(s); in gen_multi0F()
3458 translator_io_start(&s->base); in gen_multi0F()
3460 gen_helper_rdpid(s->T0, tcg_env); in gen_multi0F()
3461 gen_op_mov_reg_v(s, dflag, R_ECX, s->T0); in gen_multi0F()
3470 if (s->flags & HF_MPX_EN_MASK) { in gen_multi0F()
3472 reg = ((modrm >> 3) & 7) | REX_R(s); in gen_multi0F()
3476 || s->aflag == MO_16) { in gen_multi0F()
3479 gen_bndck(s, decode, TCG_COND_LTU, cpu_bndl[reg]); in gen_multi0F()
3483 || s->aflag == MO_16) { in gen_multi0F()
3488 gen_bndck(s, decode, TCG_COND_GTU, notu); in gen_multi0F()
3491 if (reg >= 4 || s->aflag == MO_16) { in gen_multi0F()
3495 int reg2 = (modrm & 7) | REX_B(s); in gen_multi0F()
3499 if (s->flags & HF_MPX_IU_MASK) { in gen_multi0F()
3504 gen_lea_modrm(s, decode); in gen_multi0F()
3505 if (CODE64(s)) { in gen_multi0F()
3506 tcg_gen_qemu_ld_i64(cpu_bndl[reg], s->A0, in gen_multi0F()
3507 s->mem_index, MO_LEUQ); in gen_multi0F()
3508 tcg_gen_addi_tl(s->A0, s->A0, 8); in gen_multi0F()
3509 tcg_gen_qemu_ld_i64(cpu_bndu[reg], s->A0, in gen_multi0F()
3510 s->mem_index, MO_LEUQ); in gen_multi0F()
3512 tcg_gen_qemu_ld_i64(cpu_bndl[reg], s->A0, in gen_multi0F()
3513 s->mem_index, MO_LEUL); in gen_multi0F()
3514 tcg_gen_addi_tl(s->A0, s->A0, 4); in gen_multi0F()
3515 tcg_gen_qemu_ld_i64(cpu_bndu[reg], s->A0, in gen_multi0F()
3516 s->mem_index, MO_LEUL); in gen_multi0F()
3519 gen_set_hflag(s, HF_MPX_IU_MASK); in gen_multi0F()
3525 || s->aflag == MO_16 in gen_multi0F()
3530 tcg_gen_addi_tl(s->A0, cpu_regs[a.base], a.disp); in gen_multi0F()
3532 tcg_gen_movi_tl(s->A0, 0); in gen_multi0F()
3534 gen_lea_v_seg(s, s->A0, a.def_seg, s->override); in gen_multi0F()
3536 tcg_gen_mov_tl(s->T0, cpu_regs[a.index]); in gen_multi0F()
3538 tcg_gen_movi_tl(s->T0, 0); in gen_multi0F()
3540 if (CODE64(s)) { in gen_multi0F()
3541 gen_helper_bndldx64(cpu_bndl[reg], tcg_env, s->A0, s->T0); in gen_multi0F()
3545 gen_helper_bndldx32(cpu_bndu[reg], tcg_env, s->A0, s->T0); in gen_multi0F()
3549 gen_set_hflag(s, HF_MPX_IU_MASK); in gen_multi0F()
3554 if (s->flags & HF_MPX_EN_MASK) { in gen_multi0F()
3556 reg = ((modrm >> 3) & 7) | REX_R(s); in gen_multi0F()
3560 || s->aflag == MO_16) { in gen_multi0F()
3566 if (!CODE64(s)) { in gen_multi0F()
3576 tcg_gen_not_tl(s->A0, gen_lea_modrm_1(s, decode->mem, false)); in gen_multi0F()
3577 if (!CODE64(s)) { in gen_multi0F()
3578 tcg_gen_ext32u_tl(s->A0, s->A0); in gen_multi0F()
3580 tcg_gen_extu_tl_i64(cpu_bndu[reg], s->A0); in gen_multi0F()
3582 gen_set_hflag(s, HF_MPX_IU_MASK); in gen_multi0F()
3587 || s->aflag == MO_16) { in gen_multi0F()
3590 gen_bndck(s, decode, TCG_COND_GTU, cpu_bndu[reg]); in gen_multi0F()
3593 if (reg >= 4 || s->aflag == MO_16) { in gen_multi0F()
3597 int reg2 = (modrm & 7) | REX_B(s); in gen_multi0F()
3601 if (s->flags & HF_MPX_IU_MASK) { in gen_multi0F()
3606 gen_lea_modrm(s, decode); in gen_multi0F()
3607 if (CODE64(s)) { in gen_multi0F()
3608 tcg_gen_qemu_st_i64(cpu_bndl[reg], s->A0, in gen_multi0F()
3609 s->mem_index, MO_LEUQ); in gen_multi0F()
3610 tcg_gen_addi_tl(s->A0, s->A0, 8); in gen_multi0F()
3611 tcg_gen_qemu_st_i64(cpu_bndu[reg], s->A0, in gen_multi0F()
3612 s->mem_index, MO_LEUQ); in gen_multi0F()
3614 tcg_gen_qemu_st_i64(cpu_bndl[reg], s->A0, in gen_multi0F()
3615 s->mem_index, MO_LEUL); in gen_multi0F()
3616 tcg_gen_addi_tl(s->A0, s->A0, 4); in gen_multi0F()
3617 tcg_gen_qemu_st_i64(cpu_bndu[reg], s->A0, in gen_multi0F()
3618 s->mem_index, MO_LEUL); in gen_multi0F()
3625 || s->aflag == MO_16 in gen_multi0F()
3630 tcg_gen_addi_tl(s->A0, cpu_regs[a.base], a.disp); in gen_multi0F()
3632 tcg_gen_movi_tl(s->A0, 0); in gen_multi0F()
3634 gen_lea_v_seg(s, s->A0, a.def_seg, s->override); in gen_multi0F()
3636 tcg_gen_mov_tl(s->T0, cpu_regs[a.index]); in gen_multi0F()
3638 tcg_gen_movi_tl(s->T0, 0); in gen_multi0F()
3640 if (CODE64(s)) { in gen_multi0F()
3641 gen_helper_bndstx64(tcg_env, s->A0, s->T0, in gen_multi0F()
3644 gen_helper_bndstx32(tcg_env, s->A0, s->T0, in gen_multi0F()
3655 gen_illegal_opcode(s); in gen_multi0F()