Lines Matching +full:- +full:- +full:-

9  * SPDX-License-Identifier: GPL-2.0-or-later
13 #include "qemu/error-report.h"
15 #include "qemu/mmap-alloc.h"
17 #include "qapi/qapi-visit-sockets.h"
24 #include "system/address-spaces.h"
29 #include "cpu-internal.h"
30 #include "host-cpu.h"
34 #include "hw/i386/tdvf-hob.h"
37 #include "tdx-quote-generator.h"
39 #include "standard-headers/asm-x86/kvm_para.h"
66 /* Valid after kvm_arch_init()->confidential_guest_kvm_init()->tdx_kvm_init() */
106 return -EINVAL; in tdx_ioctl_internal()
110 error_setg_errno(errp, -r, "TDX ioctl %s failed, hw_errors: 0x%llx", in tdx_ioctl_internal()
141 caps->cpuid.nent = nr_cpuid_configs; in get_tdx_capabilities()
144 if (r == -E2BIG) { in get_tdx_capabilities()
160 } while (r == -E2BIG); in get_tdx_capabilities()
169 assert(!tdx_guest->tdvf_mr); in tdx_set_tdvf_region()
170 tdx_guest->tdvf_mr = tdvf_mr; in tdx_set_tdvf_region()
177 for_each_tdx_fw_entry(&tdx->tdvf, entry) { in tdx_get_hob_entry()
178 if (entry->type == TDVF_SECTION_TYPE_TD_HOB) { in tdx_get_hob_entry()
189 uint32_t nr_entries = tdx_guest->nr_ram_entries; in tdx_add_ram_entry()
190 tdx_guest->ram_entries = g_renew(TdxRamEntry, tdx_guest->ram_entries, in tdx_add_ram_entry()
193 tdx_guest->ram_entries[nr_entries].address = address; in tdx_add_ram_entry()
194 tdx_guest->ram_entries[nr_entries].length = length; in tdx_add_ram_entry()
195 tdx_guest->ram_entries[nr_entries].type = type; in tdx_add_ram_entry()
196 tdx_guest->nr_ram_entries++; in tdx_add_ram_entry()
207 if (i == tdx_guest->nr_ram_entries) { in tdx_accept_ram_range()
208 return -1; in tdx_accept_ram_range()
211 e = &tdx_guest->ram_entries[i++]; in tdx_accept_ram_range()
212 } while (address + length <= e->address || address >= e->address + e->length); in tdx_accept_ram_range()
215 * The to-be-accepted ram range must be fully contained by one in tdx_accept_ram_range()
218 if (e->address > address || in tdx_accept_ram_range()
219 e->address + e->length < address + length) { in tdx_accept_ram_range()
220 return -1; in tdx_accept_ram_range()
223 if (e->type == TDX_RAM_ADDED) { in tdx_accept_ram_range()
227 tmp_address = e->address; in tdx_accept_ram_range()
228 tmp_length = e->length; in tdx_accept_ram_range()
230 e->address = address; in tdx_accept_ram_range()
231 e->length = length; in tdx_accept_ram_range()
232 e->type = TDX_RAM_ADDED; in tdx_accept_ram_range()
234 head_length = address - tmp_address; in tdx_accept_ram_range()
242 tail_length = tmp_address + tmp_length - tail_start; in tdx_accept_ram_range()
254 if (lhs->address == rhs->address) { in tdx_ram_entry_compare()
257 if (le64_to_cpu(lhs->address) > le64_to_cpu(rhs->address)) { in tdx_ram_entry_compare()
260 return -1; in tdx_ram_entry_compare()
268 tdx_guest->ram_entries = g_new(TdxRamEntry, nr_e820_entries); in tdx_init_ram_entries()
274 tdx_guest->ram_entries[j].address = addr; in tdx_init_ram_entries()
275 tdx_guest->ram_entries[j].length = len; in tdx_init_ram_entries()
276 tdx_guest->ram_entries[j].type = TDX_RAM_UNACCEPTED; in tdx_init_ram_entries()
280 tdx_guest->nr_ram_entries = j; in tdx_init_ram_entries()
290 tdx_vcpu_ioctl(cpu, KVM_TDX_INIT_VCPU, 0, (void *)(uintptr_t)hob->address, in tdx_post_init_vcpus()
297 TdxFirmware *tdvf = &tdx_guest->tdvf; in tdx_finalize_vm()
306 switch (entry->type) { in tdx_finalize_vm()
309 entry->mem_ptr = tdvf->mem_ptr + entry->data_offset; in tdx_finalize_vm()
313 entry->mem_ptr = qemu_ram_mmap(-1, entry->size, in tdx_finalize_vm()
315 if (entry->mem_ptr == MAP_FAILED) { in tdx_finalize_vm()
317 entry->type); in tdx_finalize_vm()
320 if (tdx_accept_ram_range(entry->address, entry->size)) { in tdx_finalize_vm()
322 entry->type); in tdx_finalize_vm()
323 qemu_ram_munmap(-1, entry->mem_ptr, entry->size); in tdx_finalize_vm()
328 error_report("Unsupported TDVF section %d", entry->type); in tdx_finalize_vm()
333 qsort(tdx_guest->ram_entries, tdx_guest->nr_ram_entries, in tdx_finalize_vm()
345 .source_addr = (uintptr_t)entry->mem_ptr, in tdx_finalize_vm()
346 .gpa = entry->address, in tdx_finalize_vm()
347 .nr_pages = entry->size >> 12, in tdx_finalize_vm()
350 flags = entry->attributes & TDVF_SECTION_ATTRIBUTES_MR_EXTEND ? in tdx_finalize_vm()
358 } while (r == -EAGAIN || r == -EINTR); in tdx_finalize_vm()
364 if (entry->type == TDVF_SECTION_TYPE_TD_HOB || in tdx_finalize_vm()
365 entry->type == TDVF_SECTION_TYPE_TEMP_MEM) { in tdx_finalize_vm()
366 qemu_ram_munmap(-1, entry->mem_ptr, entry->size); in tdx_finalize_vm()
367 entry->mem_ptr = NULL; in tdx_finalize_vm()
375 ram_block = tdx_guest->tdvf_mr->ram_block; in tdx_finalize_vm()
376 ram_block_discard_range(ram_block, 0, ram_block->max_length); in tdx_finalize_vm()
379 CONFIDENTIAL_GUEST_SUPPORT(tdx_guest)->ready = true; in tdx_finalize_vm()
463 * the CPU to be in 64-bit mode. But here fixed1 is used to serve the
538 if (tdx_supported_cpuid->nent >= KVM_MAX_CPUID_ENTRIES) { in find_in_supported_entry()
543 e = &tdx_supported_cpuid->entries[tdx_supported_cpuid->nent++]; in find_in_supported_entry()
544 e->function = function; in find_in_supported_entry()
545 e->index = index; in find_in_supported_entry()
559 e1 = find_in_supported_entry(e->function, e->index); in tdx_add_supported_cpuid_by_fixed1_bits()
560 e1->eax |= e->eax; in tdx_add_supported_cpuid_by_fixed1_bits()
561 e1->ebx |= e->ebx; in tdx_add_supported_cpuid_by_fixed1_bits()
562 e1->ecx |= e->ecx; in tdx_add_supported_cpuid_by_fixed1_bits()
563 e1->edx |= e->edx; in tdx_add_supported_cpuid_by_fixed1_bits()
575 if (!((1ULL << map->attr_index) & tdx_caps->supported_attrs)) { in tdx_add_supported_cpuid_by_attrs()
579 e = find_in_supported_entry(map->cpuid_leaf, map->cpuid_subleaf); in tdx_add_supported_cpuid_by_attrs()
581 switch(map->cpuid_reg) { in tdx_add_supported_cpuid_by_attrs()
583 e->eax |= map->feat_mask; in tdx_add_supported_cpuid_by_attrs()
586 e->ebx |= map->feat_mask; in tdx_add_supported_cpuid_by_attrs()
589 e->ecx |= map->feat_mask; in tdx_add_supported_cpuid_by_attrs()
592 e->edx |= map->feat_mask; in tdx_add_supported_cpuid_by_attrs()
607 if (!((1ULL << xfam_dep->xfam_bit) & tdx_caps->supported_xfam)) { in tdx_add_supported_cpuid_by_xfam()
611 f = &feature_word_info[xfam_dep->feat_mask.index]; in tdx_add_supported_cpuid_by_xfam()
612 if (f->type != CPUID_FEATURE_WORD) { in tdx_add_supported_cpuid_by_xfam()
616 e = find_in_supported_entry(f->cpuid.eax, f->cpuid.ecx); in tdx_add_supported_cpuid_by_xfam()
617 switch(f->cpuid.reg) { in tdx_add_supported_cpuid_by_xfam()
619 e->eax |= xfam_dep->feat_mask.mask; in tdx_add_supported_cpuid_by_xfam()
622 e->ebx |= xfam_dep->feat_mask.mask; in tdx_add_supported_cpuid_by_xfam()
625 e->ecx |= xfam_dep->feat_mask.mask; in tdx_add_supported_cpuid_by_xfam()
628 e->edx |= xfam_dep->feat_mask.mask; in tdx_add_supported_cpuid_by_xfam()
634 e->eax |= (tdx_caps->supported_xfam & CPUID_XSTATE_XCR0_MASK); in tdx_add_supported_cpuid_by_xfam()
635 e->edx |= (tdx_caps->supported_xfam & CPUID_XSTATE_XCR0_MASK) >> 32; in tdx_add_supported_cpuid_by_xfam()
643 e->eax |= CPUID_XSAVE_XFD; in tdx_add_supported_cpuid_by_xfam()
644 e->ecx |= (tdx_caps->supported_xfam & CPUID_XSTATE_XSS_MASK); in tdx_add_supported_cpuid_by_xfam()
645 e->edx |= (tdx_caps->supported_xfam & CPUID_XSTATE_XSS_MASK) >> 32; in tdx_add_supported_cpuid_by_xfam()
653 e->eax = TDX_SUPPORTED_KVM_FEATURES; in tdx_add_supported_kvm_features()
665 memcpy(tdx_supported_cpuid->entries, tdx_caps->cpuid.entries, in tdx_setup_supported_cpuid()
666 tdx_caps->cpuid.nent * sizeof(struct kvm_cpuid_entry2)); in tdx_setup_supported_cpuid()
667 tdx_supported_cpuid->nent = tdx_caps->cpuid.nent; in tdx_setup_supported_cpuid()
685 if (x86ms->smm == ON_OFF_AUTO_AUTO) { in tdx_kvm_init()
686 x86ms->smm = ON_OFF_AUTO_OFF; in tdx_kvm_init()
687 } else if (x86ms->smm == ON_OFF_AUTO_ON) { in tdx_kvm_init()
689 return -EINVAL; in tdx_kvm_init()
692 if (x86ms->pic == ON_OFF_AUTO_AUTO) { in tdx_kvm_init()
693 x86ms->pic = ON_OFF_AUTO_OFF; in tdx_kvm_init()
694 } else if (x86ms->pic == ON_OFF_AUTO_ON) { in tdx_kvm_init()
696 return -EINVAL; in tdx_kvm_init()
699 if (kvm_state->kernel_irqchip_split == ON_OFF_AUTO_AUTO) { in tdx_kvm_init()
700 kvm_state->kernel_irqchip_split = ON_OFF_AUTO_ON; in tdx_kvm_init()
701 } else if (kvm_state->kernel_irqchip_split != ON_OFF_AUTO_ON) { in tdx_kvm_init()
703 return -EINVAL; in tdx_kvm_init()
717 return -EOPNOTSUPP; in tdx_kvm_init()
748 if (xcc->model) { in tdx_cpu_instance_init()
758 x86cpu->force_cpuid_0x1f = true; in tdx_cpu_instance_init()
795 fetch_cpuid->nent = size; in tdx_fetch_cpuid()
797 if (r == -E2BIG) { in tdx_fetch_cpuid()
799 size = fetch_cpuid->nent; in tdx_fetch_cpuid()
801 } while (r == -E2BIG); in tdx_fetch_cpuid()
820 CPUX86State *env = &cpu->env; in tdx_check_features()
831 if (cpu->check_cpuid || cpu->enforce_cpuid) { in tdx_check_features()
840 switch (wi->type) { in tdx_check_features()
842 entry = cpuid_find_entry(fetch_cpuid, wi->cpuid.eax, wi->cpuid.ecx); in tdx_check_features()
851 actual = cpuid_entry_get_reg(entry, wi->cpuid.reg); in tdx_check_features()
865 * Intel enumerates SYSCALL bit as 1 only when processor in 64-bit in tdx_check_features()
866 * mode and before vcpu running it's not in 64-bit mode. in tdx_check_features()
874 requested = env->features[w]; in tdx_check_features()
888 if (cpu->enforce_cpuid && mismatch) { in tdx_check_features()
889 return -EINVAL; in tdx_check_features()
892 if (cpu->phys_bits != host_cpu_phys_bits()) { in tdx_check_features()
895 cpu->phys_bits, host_cpu_phys_bits()); in tdx_check_features()
896 return -EINVAL; in tdx_check_features()
904 if ((tdx->attributes & ~tdx_caps->supported_attrs)) { in tdx_validate_attributes()
906 "(KVM supported: 0x%"PRIx64")", tdx->attributes, in tdx_validate_attributes()
907 (uint64_t)tdx_caps->supported_attrs); in tdx_validate_attributes()
908 return -1; in tdx_validate_attributes()
911 if (tdx->attributes & ~TDX_SUPPORTED_TD_ATTRS) { in tdx_validate_attributes()
914 tdx->attributes, (uint64_t)TDX_SUPPORTED_TD_ATTRS); in tdx_validate_attributes()
915 return -1; in tdx_validate_attributes()
923 CPUX86State *env = &x86cpu->env; in setup_td_guest_attributes()
925 tdx_guest->attributes |= (env->features[FEAT_7_0_ECX] & CPUID_7_0_ECX_PKS) ? in setup_td_guest_attributes()
927 tdx_guest->attributes |= x86cpu->enable_pmu ? TDX_TD_ATTRIBUTES_PERFMON : 0; in setup_td_guest_attributes()
934 CPUX86State *env = &x86cpu->env; in setup_td_xfam()
937 xfam = env->features[FEAT_XSAVE_XCR0_LO] | in setup_td_xfam()
938 env->features[FEAT_XSAVE_XCR0_HI] | in setup_td_xfam()
939 env->features[FEAT_XSAVE_XSS_LO] | in setup_td_xfam()
940 env->features[FEAT_XSAVE_XSS_HI]; in setup_td_xfam()
942 if (xfam & ~tdx_caps->supported_xfam) { in setup_td_xfam()
944 xfam, (uint64_t)tdx_caps->supported_xfam); in setup_td_xfam()
945 return -1; in setup_td_xfam()
948 tdx_guest->xfam = xfam; in setup_td_xfam()
957 for (i = 0; i < cpuids->nent; i++) { in tdx_filter_cpuid()
958 src = cpuids->entries + i; in tdx_filter_cpuid()
959 conf = cpuid_find_entry(&tdx_caps->cpuid, src->function, src->index); in tdx_filter_cpuid()
963 dest = cpuids->entries + dest_cnt; in tdx_filter_cpuid()
965 dest->function = src->function; in tdx_filter_cpuid()
966 dest->index = src->index; in tdx_filter_cpuid()
967 dest->flags = src->flags; in tdx_filter_cpuid()
968 dest->eax = src->eax & conf->eax; in tdx_filter_cpuid()
969 dest->ebx = src->ebx & conf->ebx; in tdx_filter_cpuid()
970 dest->ecx = src->ecx & conf->ecx; in tdx_filter_cpuid()
971 dest->edx = src->edx & conf->edx; in tdx_filter_cpuid()
975 cpuids->nent = dest_cnt++; in tdx_filter_cpuid()
981 CPUX86State *env = &x86cpu->env; in tdx_pre_create_vcpu()
988 QEMU_LOCK_GUARD(&tdx_guest->lock); in tdx_pre_create_vcpu()
989 if (tdx_guest->initialized) { in tdx_pre_create_vcpu()
998 return -EOPNOTSUPP; in tdx_pre_create_vcpu()
1004 error_setg_errno(errp, -r, in tdx_pre_create_vcpu()
1009 if (env->tsc_khz && (env->tsc_khz < TDX_MIN_TSC_FREQUENCY_KHZ || in tdx_pre_create_vcpu()
1010 env->tsc_khz > TDX_MAX_TSC_FREQUENCY_KHZ)) { in tdx_pre_create_vcpu()
1012 "between [%d, %d] kHz", env->tsc_khz, in tdx_pre_create_vcpu()
1014 return -EINVAL; in tdx_pre_create_vcpu()
1017 if (env->tsc_khz % (25 * 1000)) { in tdx_pre_create_vcpu()
1019 env->tsc_khz); in tdx_pre_create_vcpu()
1020 return -EINVAL; in tdx_pre_create_vcpu()
1023 /* it's safe even env->tsc_khz is 0. KVM uses host's tsc_khz in this case */ in tdx_pre_create_vcpu()
1024 r = kvm_vm_ioctl(kvm_state, KVM_SET_TSC_KHZ, env->tsc_khz); in tdx_pre_create_vcpu()
1026 error_setg_errno(errp, -r, "Unable to set TSC frequency to %"PRId64" kHz", in tdx_pre_create_vcpu()
1027 env->tsc_khz); in tdx_pre_create_vcpu()
1031 if (tdx_guest->mrconfigid) { in tdx_pre_create_vcpu()
1032 g_autofree uint8_t *data = qbase64_decode(tdx_guest->mrconfigid, in tdx_pre_create_vcpu()
1033 strlen(tdx_guest->mrconfigid), &data_len, errp); in tdx_pre_create_vcpu()
1035 return -1; in tdx_pre_create_vcpu()
1041 return -1; in tdx_pre_create_vcpu()
1043 memcpy(init_vm->mrconfigid, data, data_len); in tdx_pre_create_vcpu()
1046 if (tdx_guest->mrowner) { in tdx_pre_create_vcpu()
1047 g_autofree uint8_t *data = qbase64_decode(tdx_guest->mrowner, in tdx_pre_create_vcpu()
1048 strlen(tdx_guest->mrowner), &data_len, errp); in tdx_pre_create_vcpu()
1050 return -1; in tdx_pre_create_vcpu()
1056 return -1; in tdx_pre_create_vcpu()
1058 memcpy(init_vm->mrowner, data, data_len); in tdx_pre_create_vcpu()
1061 if (tdx_guest->mrownerconfig) { in tdx_pre_create_vcpu()
1062 g_autofree uint8_t *data = qbase64_decode(tdx_guest->mrownerconfig, in tdx_pre_create_vcpu()
1063 strlen(tdx_guest->mrownerconfig), &data_len, errp); in tdx_pre_create_vcpu()
1065 return -1; in tdx_pre_create_vcpu()
1071 return -1; in tdx_pre_create_vcpu()
1073 memcpy(init_vm->mrownerconfig, data, data_len); in tdx_pre_create_vcpu()
1086 init_vm->cpuid.nent = kvm_x86_build_cpuid(env, init_vm->cpuid.entries, 0); in tdx_pre_create_vcpu()
1087 tdx_filter_cpuid(&init_vm->cpuid); in tdx_pre_create_vcpu()
1089 init_vm->attributes = tdx_guest->attributes; in tdx_pre_create_vcpu()
1090 init_vm->xfam = tdx_guest->xfam; in tdx_pre_create_vcpu()
1093 * KVM_TDX_INIT_VM gets -EAGAIN when KVM side SEAMCALL(TDH_MNG_CREATE) in tdx_pre_create_vcpu()
1103 } while (r == -EAGAIN && --retry); in tdx_pre_create_vcpu()
1116 tdx_guest->initialized = true; in tdx_pre_create_vcpu()
1123 return tdvf_parse_metadata(&tdx_guest->tdvf, flash_ptr, size); in tdx_parse_tdvf()
1128 TdxGuest *tdx = task->opaque; in tdx_get_quote_completion()
1131 /* Maintain the number of in-flight requests. */ in tdx_get_quote_completion()
1132 qemu_mutex_lock(&tdx->lock); in tdx_get_quote_completion()
1133 tdx->num--; in tdx_get_quote_completion()
1134 qemu_mutex_unlock(&tdx->lock); in tdx_get_quote_completion()
1136 if (task->status_code == TDX_VP_GET_QUOTE_SUCCESS) { in tdx_get_quote_completion()
1137 ret = address_space_write(&address_space_memory, task->payload_gpa, in tdx_get_quote_completion()
1138 MEMTXATTRS_UNSPECIFIED, task->receive_buf, in tdx_get_quote_completion()
1139 task->receive_buf_received); in tdx_get_quote_completion()
1141 error_report("TDX: get-quote: failed to write quote data."); in tdx_get_quote_completion()
1143 task->hdr.out_len = cpu_to_le64(task->receive_buf_received); in tdx_get_quote_completion()
1146 task->hdr.error_code = cpu_to_le64(task->status_code); in tdx_get_quote_completion()
1150 ret = address_space_write(&address_space_memory, task->buf_gpa, in tdx_get_quote_completion()
1151 MEMTXATTRS_UNSPECIFIED, &task->hdr, in tdx_get_quote_completion()
1154 error_report("TDX: get-quote: failed to update GetQuote header."); in tdx_get_quote_completion()
1157 g_free(task->send_data); in tdx_get_quote_completion()
1158 g_free(task->receive_buf); in tdx_get_quote_completion()
1167 hwaddr buf_gpa = run->tdx.get_quote.gpa; in tdx_handle_get_quote()
1168 uint64_t buf_len = run->tdx.get_quote.size; in tdx_handle_get_quote()
1172 run->tdx.get_quote.ret = TDG_VP_VMCALL_INVALID_OPERAND; in tdx_handle_get_quote()
1179 run->tdx.get_quote.ret = TDG_VP_VMCALL_ALIGN_ERROR; in tdx_handle_get_quote()
1185 error_report("TDX: get-quote: failed to read GetQuote header."); in tdx_handle_get_quote()
1193 /* Only safe-guard check to avoid too large buffer size. */ in tdx_handle_get_quote()
1195 le32_to_cpu(hdr.in_len) > buf_len - TDX_GET_QUOTE_HDR_SIZE) { in tdx_handle_get_quote()
1199 if (!tdx_guest->qg_sock_addr) { in tdx_handle_get_quote()
1207 run->tdx.get_quote.ret = TDG_VP_VMCALL_SUCCESS; in tdx_handle_get_quote()
1211 qemu_mutex_lock(&tdx_guest->lock); in tdx_handle_get_quote()
1212 if (tdx_guest->num >= TDX_MAX_GET_QUOTE_REQUEST) { in tdx_handle_get_quote()
1213 qemu_mutex_unlock(&tdx_guest->lock); in tdx_handle_get_quote()
1214 run->tdx.get_quote.ret = TDG_VP_VMCALL_RETRY; in tdx_handle_get_quote()
1217 tdx_guest->num++; in tdx_handle_get_quote()
1218 qemu_mutex_unlock(&tdx_guest->lock); in tdx_handle_get_quote()
1221 task->buf_gpa = buf_gpa; in tdx_handle_get_quote()
1222 task->payload_gpa = buf_gpa + TDX_GET_QUOTE_HDR_SIZE; in tdx_handle_get_quote()
1223 task->payload_len = buf_len - TDX_GET_QUOTE_HDR_SIZE; in tdx_handle_get_quote()
1224 task->hdr = hdr; in tdx_handle_get_quote()
1225 task->completion = tdx_get_quote_completion; in tdx_handle_get_quote()
1227 task->send_data_size = le32_to_cpu(hdr.in_len); in tdx_handle_get_quote()
1228 task->send_data = g_malloc(task->send_data_size); in tdx_handle_get_quote()
1229 task->send_data_sent = 0; in tdx_handle_get_quote()
1231 if (address_space_read(&address_space_memory, task->payload_gpa, in tdx_handle_get_quote()
1232 MEMTXATTRS_UNSPECIFIED, task->send_data, in tdx_handle_get_quote()
1233 task->send_data_size) != MEMTX_OK) { in tdx_handle_get_quote()
1237 /* Mark the buffer in-flight. */ in tdx_handle_get_quote()
1245 task->receive_buf = g_malloc0(task->payload_len); in tdx_handle_get_quote()
1246 task->receive_buf_received = 0; in tdx_handle_get_quote()
1247 task->opaque = tdx_guest; in tdx_handle_get_quote()
1250 tdx_generate_quote(task, tdx_guest->qg_sock_addr); in tdx_handle_get_quote()
1251 run->tdx.get_quote.ret = TDG_VP_VMCALL_SUCCESS; in tdx_handle_get_quote()
1255 g_free(task->send_data); in tdx_handle_get_quote()
1261 if (run->tdx.get_tdvmcall_info.leaf != 1) { in tdx_handle_get_tdvmcall_info()
1265 run->tdx.get_tdvmcall_info.r11 = TDG_VP_VMCALL_SUBFUNC_GET_QUOTE; in tdx_handle_get_tdvmcall_info()
1266 run->tdx.get_tdvmcall_info.r12 = 0; in tdx_handle_get_tdvmcall_info()
1267 run->tdx.get_tdvmcall_info.r13 = 0; in tdx_handle_get_tdvmcall_info()
1268 run->tdx.get_tdvmcall_info.r14 = 0; in tdx_handle_get_tdvmcall_info()
1277 panic_info->type = GUEST_PANIC_INFORMATION_TYPE_TDX; in tdx_panicked_on_fatal_error()
1278 panic_info->u.tdx.error_code = (uint32_t) error_code; in tdx_panicked_on_fatal_error()
1279 panic_info->u.tdx.message = message; in tdx_panicked_on_fatal_error()
1280 panic_info->u.tdx.gpa = gpa; in tdx_panicked_on_fatal_error()
1295 uint64_t error_code = run->system_event.data[R_R12]; in tdx_handle_report_fatal_error()
1296 uint64_t reg_mask = run->system_event.data[R_ECX]; in tdx_handle_report_fatal_error()
1299 uint64_t gpa = -1ull; in tdx_handle_report_fatal_error()
1304 return -1; in tdx_handle_report_fatal_error()
1314 *(tmp++) = run->system_event.data[REG]; \ in tdx_handle_report_fatal_error()
1331 gpa = run->system_event.data[R_R13]; in tdx_handle_report_fatal_error()
1336 return -1; in tdx_handle_report_fatal_error()
1343 return !!(tdx->attributes & TDX_TD_ATTRIBUTES_SEPT_VE_DISABLE); in tdx_guest_get_sept_ve_disable()
1351 tdx->attributes |= TDX_TD_ATTRIBUTES_SEPT_VE_DISABLE; in tdx_guest_set_sept_ve_disable()
1353 tdx->attributes &= ~TDX_TD_ATTRIBUTES_SEPT_VE_DISABLE; in tdx_guest_set_sept_ve_disable()
1361 return g_strdup(tdx->mrconfigid); in tdx_guest_get_mrconfigid()
1368 g_free(tdx->mrconfigid); in tdx_guest_set_mrconfigid()
1369 tdx->mrconfigid = g_strdup(value); in tdx_guest_set_mrconfigid()
1376 return g_strdup(tdx->mrowner); in tdx_guest_get_mrowner()
1383 g_free(tdx->mrowner); in tdx_guest_set_mrowner()
1384 tdx->mrowner = g_strdup(value); in tdx_guest_set_mrowner()
1391 return g_strdup(tdx->mrownerconfig); in tdx_guest_get_mrownerconfig()
1398 g_free(tdx->mrownerconfig); in tdx_guest_set_mrownerconfig()
1399 tdx->mrownerconfig = g_strdup(value); in tdx_guest_set_mrownerconfig()
1408 if (!tdx->qg_sock_addr) { in tdx_guest_get_qgs()
1409 error_setg(errp, "quote-generation-socket is not set"); in tdx_guest_get_qgs()
1412 visit_type_SocketAddress(v, name, &tdx->qg_sock_addr, errp); in tdx_guest_get_qgs()
1426 if (tdx->qg_sock_addr) { in tdx_guest_set_qgs()
1427 qapi_free_SocketAddress(tdx->qg_sock_addr); in tdx_guest_set_qgs()
1430 tdx->qg_sock_addr = sock; in tdx_guest_set_qgs()
1446 qemu_mutex_init(&tdx->lock); in tdx_guest_init()
1448 cgs->require_guest_memfd = true; in tdx_guest_init()
1449 tdx->attributes = TDX_TD_ATTRIBUTES_SEPT_VE_DISABLE; in tdx_guest_init()
1451 object_property_add_uint64_ptr(obj, "attributes", &tdx->attributes, in tdx_guest_init()
1453 object_property_add_bool(obj, "sept-ve-disable", in tdx_guest_init()
1465 object_property_add(obj, "quote-generation-socket", "SocketAddress", in tdx_guest_init()
1470 qemu_mutex_init(&tdx->lock); in tdx_guest_init()
1482 klass->kvm_init = tdx_kvm_init; in tdx_guest_class_init()
1483 x86_klass->kvm_type = tdx_kvm_type; in tdx_guest_class_init()
1484 x86_klass->cpu_instance_init = tdx_cpu_instance_init; in tdx_guest_class_init()
1485 x86_klass->adjust_cpuid_features = tdx_adjust_cpuid_features; in tdx_guest_class_init()
1486 x86_klass->check_features = tdx_check_features; in tdx_guest_class_init()