Lines Matching +full:len +full:- +full:or +full:- +full:define
2 * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
6 * the Free Software Foundation; either version 2 of the License, or
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 #define HEXAGON_MMVEC_MACROS_H
21 #include "qemu/host-utils.h"
28 #define VdV (*(MMVector *restrict)(VdV_void))
29 #define VsV (*(MMVector *restrict)(VsV_void))
30 #define VuV (*(MMVector *restrict)(VuV_void))
31 #define VvV (*(MMVector *restrict)(VvV_void))
32 #define VwV (*(MMVector *restrict)(VwV_void))
33 #define VxV (*(MMVector *restrict)(VxV_void))
34 #define VyV (*(MMVector *restrict)(VyV_void))
36 #define VddV (*(MMVectorPair *restrict)(VddV_void))
37 #define VuuV (*(MMVectorPair *restrict)(VuuV_void))
38 #define VvvV (*(MMVectorPair *restrict)(VvvV_void))
39 #define VxxV (*(MMVectorPair *restrict)(VxxV_void))
41 #define QeV (*(MMQReg *restrict)(QeV_void))
42 #define QdV (*(MMQReg *restrict)(QdV_void))
43 #define QsV (*(MMQReg *restrict)(QsV_void))
44 #define QtV (*(MMQReg *restrict)(QtV_void))
45 #define QuV (*(MMQReg *restrict)(QuV_void))
46 #define QvV (*(MMQReg *restrict)(QvV_void))
47 #define QxV (*(MMQReg *restrict)(QxV_void))
50 #define LOG_VTCM_BYTE(VA, MASK, VAL, IDX) \
52 env->vtcm_log.data.ub[IDX] = (VAL); \
54 set_bit((IDX), env->vtcm_log.mask); \
56 clear_bit((IDX), env->vtcm_log.mask); \
58 env->vtcm_log.va[IDX] = (VA); \
61 #define fNOTQ(VAL) \
70 #define fGETQBITS(REG, WIDTH, MASK, BITNO) \
72 #define fGETQBIT(REG, BITNO) fGETQBITS(REG, 1, 1, BITNO)
73 #define fGENMASKW(QREG, IDX) \
78 #define fGETNIBBLE(IDX, SRC) (fSXTN(4, 8, (SRC >> (4 * IDX)) & 0xF))
79 #define fGETCRUMB(IDX, SRC) (fSXTN(2, 8, (SRC >> (2 * IDX)) & 0x3))
80 #define fGETCRUMB_SYMMETRIC(IDX, SRC) \
81 ((fGETCRUMB(IDX, SRC) >= 0 ? (2 - fGETCRUMB(IDX, SRC)) \
83 #define fGENMASKH(QREG, IDX) \
86 #define fGETMASKW(VREG, QREG, IDX) (VREG.w[IDX] & fGENMASKW((QREG), IDX))
87 #define fGETMASKH(VREG, QREG, IDX) (VREG.h[IDX] & fGENMASKH((QREG), IDX))
88 #define fCONDMASK8(QREG, IDX, YESVAL, NOVAL) \
90 #define fCONDMASK16(QREG, IDX, YESVAL, NOVAL) \
93 #define fCONDMASK32(QREG, IDX, YESVAL, NOVAL) \
96 #define fSETQBITS(REG, WIDTH, MASK, BITNO, VAL) \
102 #define fSETQBIT(REG, BITNO, VAL) fSETQBITS(REG, 1, 1, BITNO, VAL)
103 #define fVBYTES() (fVECSIZE())
104 #define fVALIGN(ADDR, LOG2_ALIGNMENT) (ADDR = ADDR & ~(LOG2_ALIGNMENT - 1))
105 #define fVLASTBYTE(ADDR, LOG2_ALIGNMENT) (ADDR = ADDR | (LOG2_ALIGNMENT - 1))
106 #define fVELEM(WIDTH) ((fVECSIZE() * 8) / WIDTH)
107 #define fVECLOGSIZE() (7)
108 #define fVECSIZE() (1 << fVECLOGSIZE())
109 #define fSWAPB(A, B) do { uint8_t tmp = A; A = B; B = tmp; } while (0)
110 #define fV_AL_CHECK(EA, MASK) \
114 #define fSCATTER_INIT(REGION_START, LENGTH, ELEMENT_SIZE) \
116 #define fGATHER_INIT(REGION_START, LENGTH, ELEMENT_SIZE) \
118 #define fSCATTER_FINISH(OP)
119 #define fGATHER_FINISH()
120 #define fLOG_SCATTER_OP(SIZE) \
122 env->vtcm_log.op = true; \
123 env->vtcm_log.op_size = SIZE; \
125 #define fVLOG_VTCM_WORD_INCREMENT(EA, OFFSET, INC, IDX, ALIGNMENT, LEN) \ argument
129 target_ulong va_high = EA + LEN; \
136 #define fVLOG_VTCM_HALFWORD_INCREMENT(EA, OFFSET, INC, IDX, ALIGNMENT, LEN) \ argument
140 target_ulong va_high = EA + LEN; \
148 #define fVLOG_VTCM_HALFWORD_INCREMENT_DV(EA, OFFSET, INC, IDX, IDX2, IDX_H, \
149 ALIGNMENT, LEN) \ argument
153 target_ulong va_high = EA + LEN; \
161 /* NOTE - Will this always be tmp_VRegs[0]; */
162 #define GATHER_FUNCTION(EA, OFFSET, IDX, LEN, ELEMENT_SIZE, BANK_IDX, QVAL) \ argument
166 target_ulong va_high = EA + LEN; \
173 env->tmp_VRegs[0].ub[ELEMENT_SIZE * IDX + i0] = B; \
177 #define fVLOG_VTCM_GATHER_WORD(EA, OFFSET, IDX, LEN) \ argument
179 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 4, IDX, 1); \
181 #define fVLOG_VTCM_GATHER_HALFWORD(EA, OFFSET, IDX, LEN) \ argument
183 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 2, IDX, 1); \
185 #define fVLOG_VTCM_GATHER_HALFWORD_DV(EA, OFFSET, IDX, IDX2, IDX_H, LEN) \ argument
187 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 2, (2 * IDX2 + IDX_H), 1); \
189 #define fVLOG_VTCM_GATHER_WORDQ(EA, OFFSET, IDX, Q, LEN) \ argument
191 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 4, IDX, \
194 #define fVLOG_VTCM_GATHER_HALFWORDQ(EA, OFFSET, IDX, Q, LEN) \ argument
196 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 2, IDX, \
199 #define fVLOG_VTCM_GATHER_HALFWORDQ_DV(EA, OFFSET, IDX, IDX2, IDX_H, Q, LEN) \ argument
201 GATHER_FUNCTION(EA, OFFSET, IDX, LEN, 2, (2 * IDX2 + IDX_H), \
204 #define SCATTER_OP_WRITE_TO_MEM(TYPE) \
208 if (test_bit(i, env->vtcm_log.mask)) { \
213 val = cpu_ldub_data_ra(env, env->vtcm_log.va[i + j], ra); \
215 inc |= env->vtcm_log.data.ub[j + i] << (8 * j); \
216 clear_bit(j + i, env->vtcm_log.mask); \
217 env->vtcm_log.data.ub[j + i] = 0; \
221 cpu_stb_data_ra(env, env->vtcm_log.va[i + j], \
227 #define SCATTER_OP_PROBE_MEM(TYPE, MMU_IDX, RETADDR) \
230 if (test_bit(i, env->vtcm_log.mask)) { \
232 probe_read(env, env->vtcm_log.va[i + j], 1, \
234 probe_write(env, env->vtcm_log.va[i + j], 1, \
240 #define SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, ELEM_SIZE, BANK_IDX, QVAL, IN) \ argument
244 target_ulong va_high = EA + LEN; \
252 #define fVLOG_VTCM_HALFWORD(EA, OFFSET, IN, IDX, LEN) \ argument
254 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 2, IDX, 1, IN); \
256 #define fVLOG_VTCM_WORD(EA, OFFSET, IN, IDX, LEN) \ argument
258 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 4, IDX, 1, IN); \
260 #define fVLOG_VTCM_HALFWORDQ(EA, OFFSET, IN, IDX, Q, LEN) \ argument
262 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 2, IDX, \
265 #define fVLOG_VTCM_WORDQ(EA, OFFSET, IN, IDX, Q, LEN) \ argument
267 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 4, IDX, \
270 #define fVLOG_VTCM_HALFWORD_DV(EA, OFFSET, IN, IDX, IDX2, IDX_H, LEN) \ argument
272 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 2, \
275 #define fVLOG_VTCM_HALFWORDQ_DV(EA, OFFSET, IN, IDX, Q, IDX2, IDX_H, LEN) \ argument
277 SCATTER_FUNCTION(EA, OFFSET, IDX, LEN, 2, (2 * IDX2 + IDX_H), \
280 #define fSTORERELEASE(EA, TYPE) \
282 fV_AL_CHECK(EA, fVECSIZE() - 1); \
285 #define fLOADMMV(EA, DST) gen_vreg_load(ctx, DST##_off, EA, true)
288 #define fLOADMMVU(EA, DST) gen_vreg_load(ctx, DST##_off, EA, false)
291 #define fSTOREMMV(EA, SRC) \
292 gen_vreg_store(ctx, EA, SRC##_off, insn->slot, true)
295 #define fSTOREMMVQ(EA, SRC, MASK) \
296 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, false)
299 #define fSTOREMMVNQ(EA, SRC, MASK) \
300 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, true)
303 #define fSTOREMMVU(EA, SRC) \
304 gen_vreg_store(ctx, EA, SRC##_off, insn->slot, false)
306 #define fVFOREACH(WIDTH, VAR) for (VAR = 0; VAR < fVELEM(WIDTH); VAR++)
307 #define fVARRAY_ELEMENT_ACCESS(ARRAY, TYPE, INDEX) \
311 #define fVSATDW(U, V) fVSATW(((((long long)U) << 32) | fZXTN(32, 64, V)))
312 #define fVASL_SATHI(U, V) fVSATW(((U) << 1) | ((V) >> 31))
313 #define fVUADDSAT(WIDTH, U, V) \
315 #define fVSADDSAT(WIDTH, U, V) \
317 #define fVUSUBSAT(WIDTH, U, V) \
318 fVSATUN(WIDTH, fZXTN(WIDTH, 2 * WIDTH, U) - fZXTN(WIDTH, 2 * WIDTH, V))
319 #define fVSSUBSAT(WIDTH, U, V) \
320 fVSATN(WIDTH, fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V))
321 #define fVAVGU(WIDTH, U, V) \
323 #define fVAVGURND(WIDTH, U, V) \
325 #define fVNAVGU(WIDTH, U, V) \
326 ((fZXTN(WIDTH, 2 * WIDTH, U) - fZXTN(WIDTH, 2 * WIDTH, V)) >> 1)
327 #define fVNAVGURNDSAT(WIDTH, U, V) \
328 fVSATUN(WIDTH, ((fZXTN(WIDTH, 2 * WIDTH, U) - \
330 #define fVAVGS(WIDTH, U, V) \
332 #define fVAVGSRND(WIDTH, U, V) \
334 #define fVNAVGS(WIDTH, U, V) \
335 ((fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V)) >> 1)
336 #define fVNAVGSRND(WIDTH, U, V) \
337 ((fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V) + 1) >> 1)
338 #define fVNAVGSRNDSAT(WIDTH, U, V) \
339 fVSATN(WIDTH, ((fSXTN(WIDTH, 2 * WIDTH, U) - \
341 #define fVNOROUND(VAL, SHAMT) VAL
342 #define fVNOSAT(VAL) VAL
343 #define fVROUND(VAL, SHAMT) \
344 ((VAL) + (((SHAMT) > 0) ? (1LL << ((SHAMT) - 1)) : 0))
345 #define fCARRY_FROM_ADD32(A, B, C) \
347 #define fUARCH_NOTE_PUMP_4X()
348 #define fUARCH_NOTE_PUMP_2X()
350 #define IV1DEAD()
352 #define fGET10BIT(COE, VAL, POS) \