2  *  Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
23 int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)  in hexagon_gdb_read_register()  argument
27     if (n == HEX_REG_P3_0_ALIASED) {  in hexagon_gdb_read_register()
30             p3_0 = deposit32(p3_0, i * 8, 8, env->pred[i]);  in hexagon_gdb_read_register()
35     if (n < TOTAL_PER_THREAD_REGS) {  in hexagon_gdb_read_register()
36         return gdb_get_regl(mem_buf, env->gpr[n]);  in hexagon_gdb_read_register()
39     n -= TOTAL_PER_THREAD_REGS;  in hexagon_gdb_read_register()
41     if (n < NUM_PREGS) {  in hexagon_gdb_read_register()
42         return gdb_get_reg8(mem_buf, env->pred[n]);  in hexagon_gdb_read_register()
45     n -= NUM_PREGS;  in hexagon_gdb_read_register()
50 int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)  in hexagon_gdb_write_register()  argument
54     if (n == HEX_REG_P3_0_ALIASED) {  in hexagon_gdb_write_register()
57             env->pred[i] = extract32(p3_0, i * 8, 8);  in hexagon_gdb_write_register()
62     if (n < TOTAL_PER_THREAD_REGS) {  in hexagon_gdb_write_register()
63         env->gpr[n] = ldl_le_p(mem_buf);  in hexagon_gdb_write_register()
67     n -= TOTAL_PER_THREAD_REGS;  in hexagon_gdb_write_register()
69     if (n < NUM_PREGS) {  in hexagon_gdb_write_register()
70         env->pred[n] = ldl_le_p(mem_buf) & 0xff;  in hexagon_gdb_write_register()
74     n -= NUM_PREGS;  in hexagon_gdb_write_register()
79 static int gdb_get_vreg(CPUHexagonState *env, GByteArray *mem_buf, int n)  in gdb_get_vreg()  argument
83     for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {  in gdb_get_vreg()
84         total += gdb_get_regl(mem_buf, env->VRegs[n].uw[i]);  in gdb_get_vreg()
89 static int gdb_get_qreg(CPUHexagonState *env, GByteArray *mem_buf, int n)  in gdb_get_qreg()  argument
93     for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {  in gdb_get_qreg()
94         total += gdb_get_regl(mem_buf, env->QRegs[n].uw[i]);  in gdb_get_qreg()
99 int hexagon_hvx_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)  in hexagon_hvx_gdb_read_register()  argument
102     CPUHexagonState *env = &cpu->env;  in hexagon_hvx_gdb_read_register()
104     if (n < NUM_VREGS) {  in hexagon_hvx_gdb_read_register()
105         return gdb_get_vreg(env, mem_buf, n);  in hexagon_hvx_gdb_read_register()
107     n -= NUM_VREGS;  in hexagon_hvx_gdb_read_register()
109     if (n < NUM_QREGS) {  in hexagon_hvx_gdb_read_register()
110         return gdb_get_qreg(env, mem_buf, n);  in hexagon_hvx_gdb_read_register()
116 static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)  in gdb_put_vreg()  argument
119     for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {  in gdb_put_vreg()
120         env->VRegs[n].uw[i] = ldl_le_p(mem_buf);  in gdb_put_vreg()
126 static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)  in gdb_put_qreg()  argument
129     for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {  in gdb_put_qreg()
130         env->QRegs[n].uw[i] = ldl_le_p(mem_buf);  in gdb_put_qreg()
136 int hexagon_hvx_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)  in hexagon_hvx_gdb_write_register()  argument
139     CPUHexagonState *env = &cpu->env;  in hexagon_hvx_gdb_write_register()
141    if (n < NUM_VREGS) {  in hexagon_hvx_gdb_write_register()
142         return gdb_put_vreg(env, mem_buf, n);  in hexagon_hvx_gdb_write_register()
144     n -= NUM_VREGS;  in hexagon_hvx_gdb_write_register()
146     if (n < NUM_QREGS) {  in hexagon_hvx_gdb_write_register()
147         return gdb_put_qreg(env, mem_buf, n);  in hexagon_hvx_gdb_write_register()