Lines Matching +full:check +full:- +full:patch
2 * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
27 #define fZXTN(N, M, VAL) ((VAL) & ((1LL << (N)) - 1))
38 * Certain operand types represent a non-contiguous set of values.
39 * For example, the compound compare-and-jump instruction can only access
40 * registers R0-R7 and R16-23.
53 insn->regno[OPNUM] = DECODE_REGISTER_##NAME[insn->regno[OPNUM]];
69 Insn *insn = ctx->insn; in DECODE_MAPPED()
70 if (!insn->extension_valid || in DECODE_MAPPED()
71 insn->which_extended != immno) { in DECODE_MAPPED()
104 direction = -1; in decode_send_insn_to()
107 tmpinsn = packet->insn[i]; in decode_send_insn_to()
108 packet->insn[i] = packet->insn[i + direction]; in decode_send_insn_to()
109 packet->insn[i + direction] = tmpinsn; in decode_send_insn_to()
119 for (i = 1; i < packet->num_insns; i++) { in decode_fill_newvalue_regno()
120 if (GET_ATTRIB(packet->insn[i].opcode, A_DOTNEWVALUE) && in decode_fill_newvalue_regno()
121 !GET_ATTRIB(packet->insn[i].opcode, A_EXTENSION)) { in decode_fill_newvalue_regno()
123 g_assert(packet->insn[i].new_read_idx != -1); in decode_fill_newvalue_regno()
124 use_regidx = packet->insn[i].new_read_idx; in decode_fill_newvalue_regno()
127 * What's encoded at the N-field is the offset to who's producing in decode_fill_newvalue_regno()
131 offset = packet->insn[i].regno[use_regidx] >> 1; in decode_fill_newvalue_regno()
132 def_idx = i - offset; in decode_fill_newvalue_regno()
134 if (GET_ATTRIB(packet->insn[i - j - 1].opcode, A_IT_EXTENDER)) { in decode_fill_newvalue_regno()
135 def_idx--; in decode_fill_newvalue_regno()
140 * Check for a badly encoded N-field which points to an instruction in decode_fill_newvalue_regno()
141 * out-of-range in decode_fill_newvalue_regno()
143 g_assert(!((def_idx < 0) || (def_idx > (packet->num_insns - 1)))); in decode_fill_newvalue_regno()
145 /* Now patch up the consumer with the register number */ in decode_fill_newvalue_regno()
146 g_assert(packet->insn[def_idx].dest_idx != -1); in decode_fill_newvalue_regno()
147 dst_idx = packet->insn[def_idx].dest_idx; in decode_fill_newvalue_regno()
148 packet->insn[i].regno[use_regidx] = in decode_fill_newvalue_regno()
149 packet->insn[def_idx].regno[dst_idx]; in decode_fill_newvalue_regno()
152 * check if it was dynamically cancelled in decode_fill_newvalue_regno()
154 packet->insn[i].new_value_producer_slot = in decode_fill_newvalue_regno()
155 packet->insn[def_idx].slot; in decode_fill_newvalue_regno()
164 int numinsns = pkt->num_insns; in decode_split_cmpjump()
167 * First, split all compare-jumps. in decode_split_cmpjump()
173 /* It's a cmp-jump */ in decode_split_cmpjump()
174 if (GET_ATTRIB(pkt->insn[i].opcode, A_NEWCMPJUMP)) { in decode_split_cmpjump()
175 last = pkt->num_insns; in decode_split_cmpjump()
176 pkt->insn[last] = pkt->insn[i]; /* copy the instruction */ in decode_split_cmpjump()
177 pkt->insn[last].part1 = true; /* last insn does the CMP */ in decode_split_cmpjump()
178 pkt->insn[i].part1 = false; /* existing insn does the JUMP */ in decode_split_cmpjump()
179 pkt->num_insns++; in decode_split_cmpjump()
183 /* Now re-shuffle all the compares back to the beginning */ in decode_split_cmpjump()
184 for (i = 0; i < pkt->num_insns; i++) { in decode_split_cmpjump()
185 if (pkt->insn[i].part1) { in decode_split_cmpjump()
217 int numinsns = pkt->num_insns; in decode_set_insn_attr_fields()
220 pkt->pkt_has_cof = false; in decode_set_insn_attr_fields()
221 pkt->pkt_has_multi_cof = false; in decode_set_insn_attr_fields()
222 pkt->pkt_has_endloop = false; in decode_set_insn_attr_fields()
223 pkt->pkt_has_dczeroa = false; in decode_set_insn_attr_fields()
226 opcode = pkt->insn[i].opcode; in decode_set_insn_attr_fields()
227 if (pkt->insn[i].part1) { in decode_set_insn_attr_fields()
228 continue; /* Skip compare of cmp-jumps */ in decode_set_insn_attr_fields()
232 pkt->pkt_has_dczeroa = true; in decode_set_insn_attr_fields()
238 if (pkt->insn[i].slot == 0) { in decode_set_insn_attr_fields()
239 pkt->pkt_has_store_s0 = true; in decode_set_insn_attr_fields()
241 pkt->pkt_has_store_s1 = true; in decode_set_insn_attr_fields()
247 if (pkt->pkt_has_cof) { in decode_set_insn_attr_fields()
248 pkt->pkt_has_multi_cof = true; in decode_set_insn_attr_fields()
250 pkt->pkt_has_cof = true; in decode_set_insn_attr_fields()
253 pkt->insn[i].is_endloop = decode_opcode_ends_loop(opcode); in decode_set_insn_attr_fields()
255 pkt->pkt_has_endloop |= pkt->insn[i].is_endloop; in decode_set_insn_attr_fields()
257 if (pkt->pkt_has_endloop) { in decode_set_insn_attr_fields()
258 if (pkt->pkt_has_cof) { in decode_set_insn_attr_fields()
259 pkt->pkt_has_multi_cof = true; in decode_set_insn_attr_fields()
261 pkt->pkt_has_cof = true; in decode_set_insn_attr_fields()
275 bool flag; /* flag means we've seen a non-memory instruction */ in decode_shuffle_for_execution()
277 int last_insn = packet->num_insns - 1; in decode_shuffle_for_execution()
283 if (decode_opcode_ends_loop(packet->insn[last_insn].opcode)) { in decode_shuffle_for_execution()
284 last_insn--; in decode_shuffle_for_execution()
292 * Iterate backwards. If we see a non-memory instruction, in decode_shuffle_for_execution()
296 for (flag = false, n_mems = 0, i = last_insn; i >= 0; i--) { in decode_shuffle_for_execution()
297 int opcode = packet->insn[i].opcode; in decode_shuffle_for_execution()
300 decode_send_insn_to(packet, i, last_insn - n_mems); in decode_shuffle_for_execution()
326 int opcode = packet->insn[i].opcode; in decode_shuffle_for_execution()
328 if (packet->insn[i].has_pred_dest && in decode_shuffle_for_execution()
337 !decode_opcode_ends_loop(packet->insn[i].opcode)) { in decode_shuffle_for_execution()
369 if (GET_ATTRIB(packet->insn[i].opcode, A_DOTNEWVALUE)) { in decode_shuffle_for_execution()
382 immed_num = pkt->insn[i].which_extended; in apply_extender()
383 base_immed = pkt->insn[i].immed[immed_num]; in apply_extender()
385 pkt->insn[i].immed[immed_num] = extender | fZXTN(6, 32, base_immed); in apply_extender()
391 for (i = 0; i < packet->num_insns; i++) { in decode_apply_extenders()
392 if (GET_ATTRIB(packet->insn[i].opcode, A_IT_EXTENDER)) { in decode_apply_extenders()
393 packet->insn[i + 1].extension_valid = true; in decode_apply_extenders()
394 apply_extender(packet, i + 1, packet->insn[i].immed[0]); in decode_apply_extenders()
402 for (i = 0; i < packet->num_insns; i++) { in decode_remove_extenders()
403 if (GET_ATTRIB(packet->insn[i].opcode, A_IT_EXTENDER)) { in decode_remove_extenders()
406 (j < packet->num_insns - 1) && (j < INSTRUCTIONS_MAX - 1); in decode_remove_extenders()
408 packet->insn[j] = packet->insn[j + 1]; in decode_remove_extenders()
410 packet->num_insns--; in decode_remove_extenders()
417 if (GET_ATTRIB(pkt->insn[slot].opcode, A_EXTENSION)) { in get_valid_slots()
418 return mmvec_ext_decode_find_iclass_slots(pkt->insn[slot].opcode); in get_valid_slots()
420 return find_iclass_slots(pkt->insn[slot].opcode, in get_valid_slots()
421 pkt->insn[slot].iclass); in get_valid_slots()
428 * A duplex is encoded as a 32-bit instruction with bits [15:14] set to 00.
429 * The sub-instructions that comprise a duplex are encoded as 13-bit fields
432 * Per table 10-4, the 4-bit duplex iclass is encoded in bits 31:29, 13
442 * Per table 10-5, the duplex ICLASS field values that specify the group of
443 * each sub-instruction in a duplex
488 insn->generate = opcode_genptr[insn->opcode]; in decode_insns()
489 insn->iclass = iclass_bits(encoding); in decode_insns()
504 insn->generate = opcode_genptr[insn->opcode]; in decode_insns()
505 insn->iclass = iclass_bits(encoding); in decode_insns()
506 ctx->insn = ++insn; in decode_insns()
508 insn->generate = opcode_genptr[insn->opcode]; in decode_insns()
509 insn->iclass = iclass_bits(encoding); in decode_insns()
520 insn->opcode = J2_endloop01; in decode_add_endloop_insn()
521 insn->generate = opcode_genptr[J2_endloop01]; in decode_add_endloop_insn()
523 insn->opcode = J2_endloop1; in decode_add_endloop_insn()
524 insn->generate = opcode_genptr[J2_endloop1]; in decode_add_endloop_insn()
526 insn->opcode = J2_endloop0; in decode_add_endloop_insn()
527 insn->generate = opcode_genptr[J2_endloop0]; in decode_add_endloop_insn()
542 for (int i = 0; i < pkt->num_insns; i++) { in has_valid_slot_assignment()
544 Insn *insn = &pkt->insn[i]; in has_valid_slot_assignment()
545 if (decode_opcode_ends_loop(insn->opcode)) { in has_valid_slot_assignment()
549 slot_mask = 1 << insn->slot; in has_valid_slot_assignment()
573 for (i = 0, slot = 3; i < pkt->num_insns; i++) { in decode_set_slot_number()
577 slot--; in decode_set_slot_number()
579 pkt->insn[i].slot = slot; in decode_set_slot_number()
582 slot--; in decode_set_slot_number()
586 /* Fix the exceptions - mem insns to slot 0,1 */ in decode_set_slot_number()
587 for (i = pkt->num_insns - 1; i >= 0; i--) { in decode_set_slot_number()
589 if ((GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE) || in decode_set_slot_number()
590 GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE_PACKET_RULES)) && in decode_set_slot_number()
593 pkt->insn[i].slot = 0; in decode_set_slot_number()
598 if ((GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE) || in decode_set_slot_number()
599 GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE_PACKET_RULES)) && in decode_set_slot_number()
601 pkt->insn[i].slot = 1; in decode_set_slot_number()
605 /* Fix the exceptions - duplex always slot 0,1 */ in decode_set_slot_number()
606 for (i = pkt->num_insns - 1; i >= 0; i--) { in decode_set_slot_number()
608 if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN) && !hit_duplex) { in decode_set_slot_number()
610 pkt->insn[i].slot = 0; in decode_set_slot_number()
615 if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN) && hit_duplex) { in decode_set_slot_number()
616 pkt->insn[i].slot = 1; in decode_set_slot_number()
620 /* Fix the exceptions - slot 1 is never empty, always aligns to slot 0 */ in decode_set_slot_number()
621 for (i = pkt->num_insns - 1; i >= 0; i--) { in decode_set_slot_number()
623 if (pkt->insn[i].slot == 0) { in decode_set_slot_number()
624 bool is_endloop = (pkt->insn[i].opcode == J2_endloop01); in decode_set_slot_number()
625 is_endloop |= (pkt->insn[i].opcode == J2_endloop0); in decode_set_slot_number()
626 is_endloop |= (pkt->insn[i].opcode == J2_endloop1); in decode_set_slot_number()
637 if (pkt->insn[i].slot == 1) { in decode_set_slot_number()
645 pkt->insn[slot1_iidx].slot = 0; in decode_set_slot_number()
672 Insn *insn = &pkt->insn[num_insns]; in decode_packet()
673 ctx->insn = insn; in decode_packet()
682 if (pkt->insn[num_insns].opcode == A4_ext) { in decode_packet()
683 pkt->insn[num_insns + 1].extension_valid = true; in decode_packet()
689 pkt->num_insns = num_insns; in decode_packet()
694 pkt->encod_pkt_size_in_bytes = words_read * 4; in decode_packet()
695 pkt->pkt_has_hvx = false; in decode_packet()
697 pkt->pkt_has_hvx |= in decode_packet()
698 GET_ATTRIB(pkt->insn[i].opcode, A_CVI); in decode_packet()
702 * Check for :endloop in the parse bits in decode_packet()
708 decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 0); in decode_packet()
715 decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 10); in decode_packet()
717 decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 1); in decode_packet()
719 decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 0); in decode_packet()
733 if (pkt->pkt_has_hvx) { in decode_packet()
746 /* Used for "-d in_asm" logging */