Lines Matching +full:- +full:- +full:-
4 * Copyright (c) 2019-2020 Michael Rolnik
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
23 #include "qemu/qemu-print.h"
24 #include "exec/translation-block.h"
25 #include "system/address-spaces.h"
27 #include "disas/dis-asm.h"
28 #include "tcg/debug-assert.h"
29 #include "hw/qdev-properties.h"
30 #include "accel/tcg/cpu-ops.h"
36 cpu->env.pc_w = value / 2; /* internally PC points to words */ in avr_cpu_set_pc()
43 return cpu->env.pc_w * 2; in avr_cpu_get_pc()
48 return (cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_RESET)) in avr_cpu_has_work()
62 if (env->fullacc) { in avr_get_tb_cpu_state()
65 if (env->skip) { in avr_get_tb_cpu_state()
69 return (TCGTBCPUState){ .pc = env->pc_w * 2, .flags = flags }; in avr_get_tb_cpu_state()
76 cpu_env(cs)->pc_w = tb->pc / 2; /* internally PC points to words */ in avr_cpu_synchronize_from_tb()
83 cpu_env(cs)->pc_w = data[0]; in avr_restore_state_to_opc()
91 CPUAVRState *env = &cpu->env; in avr_cpu_reset_hold()
93 if (mcc->parent_phases.hold) { in avr_cpu_reset_hold()
94 mcc->parent_phases.hold(obj, type); in avr_cpu_reset_hold()
97 env->pc_w = 0; in avr_cpu_reset_hold()
98 env->sregI = 1; in avr_cpu_reset_hold()
99 env->sregC = 0; in avr_cpu_reset_hold()
100 env->sregZ = 0; in avr_cpu_reset_hold()
101 env->sregN = 0; in avr_cpu_reset_hold()
102 env->sregV = 0; in avr_cpu_reset_hold()
103 env->sregS = 0; in avr_cpu_reset_hold()
104 env->sregH = 0; in avr_cpu_reset_hold()
105 env->sregT = 0; in avr_cpu_reset_hold()
107 env->rampD = 0; in avr_cpu_reset_hold()
108 env->rampX = 0; in avr_cpu_reset_hold()
109 env->rampY = 0; in avr_cpu_reset_hold()
110 env->rampZ = 0; in avr_cpu_reset_hold()
111 env->eind = 0; in avr_cpu_reset_hold()
112 env->sp = cpu->init_sp; in avr_cpu_reset_hold()
114 env->skip = 0; in avr_cpu_reset_hold()
116 memset(env->r, 0, sizeof(env->r)); in avr_cpu_reset_hold()
121 info->endian = BFD_ENDIAN_LITTLE; in avr_cpu_disas_set_info()
122 info->mach = bfd_arch_avr; in avr_cpu_disas_set_info()
123 info->print_insn = avr_print_insn; in avr_cpu_disas_set_info()
142 mcc->parent_realize(dev, errp); in avr_cpu_realizefn()
147 memory_region_init_io(&cpu->cpu_reg1, OBJECT(cpu), &avr_cpu_reg1, env, in avr_cpu_realizefn()
148 "avr-cpu-reg1", 32); in avr_cpu_realizefn()
150 OFFSET_DATA, &cpu->cpu_reg1); in avr_cpu_realizefn()
152 memory_region_init_io(&cpu->cpu_reg2, OBJECT(cpu), &avr_cpu_reg2, env, in avr_cpu_realizefn()
153 "avr-cpu-reg2", 8); in avr_cpu_realizefn()
155 OFFSET_DATA + 0x58, &cpu->cpu_reg2); in avr_cpu_realizefn()
161 CPUAVRState *env = &cpu->env; in avr_cpu_set_int()
166 env->intsrc |= mask; in avr_cpu_set_int()
169 env->intsrc &= ~mask; in avr_cpu_set_int()
170 if (env->intsrc == 0) { in avr_cpu_set_int()
182 sizeof(cpu->env.intsrc) * 8); in avr_cpu_initfn()
186 DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0),
200 qemu_fprintf(f, "PC: %06x\n", env->pc_w * 2); /* PC points to words */ in avr_cpu_dump_state()
201 qemu_fprintf(f, "SP: %04x\n", env->sp); in avr_cpu_dump_state()
202 qemu_fprintf(f, "rampD: %02x\n", env->rampD >> 16); in avr_cpu_dump_state()
203 qemu_fprintf(f, "rampX: %02x\n", env->rampX >> 16); in avr_cpu_dump_state()
204 qemu_fprintf(f, "rampY: %02x\n", env->rampY >> 16); in avr_cpu_dump_state()
205 qemu_fprintf(f, "rampZ: %02x\n", env->rampZ >> 16); in avr_cpu_dump_state()
206 qemu_fprintf(f, "EIND: %02x\n", env->eind >> 16); in avr_cpu_dump_state()
207 qemu_fprintf(f, "X: %02x%02x\n", env->r[27], env->r[26]); in avr_cpu_dump_state()
208 qemu_fprintf(f, "Y: %02x%02x\n", env->r[29], env->r[28]); in avr_cpu_dump_state()
209 qemu_fprintf(f, "Z: %02x%02x\n", env->r[31], env->r[30]); in avr_cpu_dump_state()
211 env->sregI ? 'I' : '-', in avr_cpu_dump_state()
212 env->sregT ? 'T' : '-', in avr_cpu_dump_state()
213 env->sregH ? 'H' : '-', in avr_cpu_dump_state()
214 env->sregS ? 'S' : '-', in avr_cpu_dump_state()
215 env->sregV ? 'V' : '-', in avr_cpu_dump_state()
216 env->sregN ? '-' : 'N', /* Zf has negative logic */ in avr_cpu_dump_state()
217 env->sregZ ? 'Z' : '-', in avr_cpu_dump_state()
218 env->sregC ? 'I' : '-'); in avr_cpu_dump_state()
219 qemu_fprintf(f, "SKIP: %02x\n", env->skip); in avr_cpu_dump_state()
222 for (i = 0; i < ARRAY_SIZE(env->r); i++) { in avr_cpu_dump_state()
223 qemu_fprintf(f, "R[%02d]: %02x ", i, env->r[i]); in avr_cpu_dump_state()
232 #include "hw/core/sysemu-cpu-ops.h"
256 * non-aligned MO_16 accesses for stack push/pop.
268 device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize); in avr_cpu_class_init()
273 &mcc->parent_phases); in avr_cpu_class_init()
275 cc->class_by_name = avr_cpu_class_by_name; in avr_cpu_class_init()
277 cc->dump_state = avr_cpu_dump_state; in avr_cpu_class_init()
278 cc->set_pc = avr_cpu_set_pc; in avr_cpu_class_init()
279 cc->get_pc = avr_cpu_get_pc; in avr_cpu_class_init()
280 dc->vmsd = &vms_avr_cpu; in avr_cpu_class_init()
281 cc->sysemu_ops = &avr_sysemu_ops; in avr_cpu_class_init()
282 cc->disas_set_info = avr_cpu_disas_set_info; in avr_cpu_class_init()
283 cc->gdb_read_register = avr_cpu_gdb_read_register; in avr_cpu_class_init()
284 cc->gdb_write_register = avr_cpu_gdb_write_register; in avr_cpu_class_init()
285 cc->gdb_adjust_breakpoint = avr_cpu_gdb_adjust_breakpoint; in avr_cpu_class_init()
286 cc->gdb_core_xml_file = "avr-cpu.xml"; in avr_cpu_class_init()
287 cc->tcg_ops = &avr_tcg_ops; in avr_cpu_class_init()
292 * --------------------------------------
334 * --------------------------------------
365 * --------------------------------------